Author: Jonathan Thackray Date: 2025-04-08T11:45:47+01:00 New Revision: 204d8c0d588b647e63d925705a7fe12c47242fc9
URL: https://github.com/llvm/llvm-project/commit/204d8c0d588b647e63d925705a7fe12c47242fc9 DIFF: https://github.com/llvm/llvm-project/commit/204d8c0d588b647e63d925705a7fe12c47242fc9.diff LOG: [clang][llvm] Fix AArch64 MOP4{A/S} intrinsic tests (NFC) (#134746) Fix some of the recently-added tests (PRs #127797, #128854, #129226 and #129230) which were incorrectly defined. Added: Modified: clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x2.c clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x1.c clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c Removed: ################################################################################ diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c index 94a839d053479..3f2a79dc5c7c3 100644 --- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c +++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c @@ -3,8 +3,8 @@ // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s // RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x2.c b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x2.c index 3c8bd372aa547..36e0b754b1d35 100644 --- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x2.c +++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x2.c @@ -3,8 +3,8 @@ // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s @@ -27,7 +27,7 @@ // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_s8_s8(svint8_t zn, svint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_s8_s8)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_s8_s8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_s8_s8( @@ -41,7 +41,7 @@ void test_svmop4a_1x2_za32_s8_s8(svint8_t zn, svint8x2_t zm) __arm_streaming __a // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_s8_s8(svint8_t zn, svint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_s8_s8)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_s8_s8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_u8_u8( @@ -55,7 +55,7 @@ void test_svmop4s_1x2_za32_s8_s8(svint8_t zn, svint8x2_t zm) __arm_streaming __a // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_u8_u8(svuint8_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_u8_u8)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_u8_u8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_u8_u8( @@ -69,7 +69,7 @@ void test_svmop4a_1x2_za32_u8_u8(svuint8_t zn, svuint8x2_t zm) __arm_streaming _ // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_u8_u8(svuint8_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_u8_u8)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_u8_u8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_s8_u8( @@ -83,7 +83,7 @@ void test_svmop4s_1x2_za32_u8_u8(svuint8_t zn, svuint8x2_t zm) __arm_streaming _ // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_s8_u8(svint8_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_s8_u8)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_s8_u8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_s8_u8( @@ -97,7 +97,7 @@ void test_svmop4a_1x2_za32_s8_u8(svint8_t zn, svuint8x2_t zm) __arm_streaming __ // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_s8_u8(svint8_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_s8_u8)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_s8_u8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_u8_s8( @@ -111,7 +111,7 @@ void test_svmop4s_1x2_za32_s8_u8(svint8_t zn, svuint8x2_t zm) __arm_streaming __ // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_u8_s8(svuint8_t zn, svint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_u8_s8)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_u8_s8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_u8_s8( @@ -125,7 +125,7 @@ void test_svmop4a_1x2_za32_u8_s8(svuint8_t zn, svint8x2_t zm) __arm_streaming __ // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_u8_s8(svuint8_t zn, svint8x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_u8_s8)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_u8_s8)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_s16_s16( @@ -139,7 +139,7 @@ void test_svmop4s_1x2_za32_u8_s8(svuint8_t zn, svint8x2_t zm) __arm_streaming __ // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_s16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_s16_s16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_s16_s16( @@ -153,7 +153,7 @@ void test_svmop4a_1x2_za32_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_s16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_s16_s16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_u16_u16( @@ -167,7 +167,7 @@ void test_svmop4s_1x2_za32_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_u16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_u16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_u16_u16( @@ -181,7 +181,7 @@ void test_svmop4a_1x2_za32_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streami // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_u16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_u16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_f16_f16( @@ -195,7 +195,7 @@ void test_svmop4s_1x2_za32_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streami // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_f16_f16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_f16_f16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_f16_f16( @@ -209,7 +209,7 @@ void test_svmop4a_1x2_za32_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_f16_f16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_f16_f16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_bf16_bf16( @@ -223,7 +223,7 @@ void test_svmop4s_1x2_za32_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_bf16_bf16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_bf16_bf16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_bf16_bf16( @@ -237,7 +237,7 @@ void test_svmop4a_1x2_za32_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_s // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_bf16_bf16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_bf16_bf16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za64_s16_s16( @@ -251,7 +251,7 @@ void test_svmop4s_1x2_za32_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_s // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za64_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za64,_s16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za64,_s16_s16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za64_s16_s16( @@ -265,7 +265,7 @@ void test_svmop4a_1x2_za64_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za64_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za64,_s16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za64,_s16_s16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za64_u16_u16( @@ -279,7 +279,7 @@ void test_svmop4s_1x2_za64_s16_s16(svint16_t zn, svint16x2_t zm) __arm_streaming // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za64_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za64,_u16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za64,_u16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za64_u16_u16( @@ -293,7 +293,7 @@ void test_svmop4a_1x2_za64_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streami // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za64_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za64,_u16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za64,_u16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za64_s16_u16( @@ -307,7 +307,7 @@ void test_svmop4s_1x2_za64_u16_u16(svuint16_t zn, svuint16x2_t zm) __arm_streami // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za64_s16_u16(svint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za64,_s16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za64,_s16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za64_s16_u16( @@ -321,7 +321,7 @@ void test_svmop4a_1x2_za64_s16_u16(svint16_t zn, svuint16x2_t zm) __arm_streamin // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za64_s16_u16(svint16_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za64,_s16_u16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za64,_s16_u16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za64_u16_s16( @@ -335,7 +335,7 @@ void test_svmop4s_1x2_za64_s16_u16(svint16_t zn, svuint16x2_t zm) __arm_streamin // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za64_u16_s16(svuint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za64,_u16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za64,_u16_s16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za64_u16_s16( @@ -349,7 +349,7 @@ void test_svmop4a_1x2_za64_u16_s16(svuint16_t zn, svint16x2_t zm) __arm_streamin // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za64_u16_s16(svuint16_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za64,_u16_s16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za64,_u16_s16)(1, zn, zm); } @@ -364,7 +364,7 @@ void test_svmop4s_1x2_za64_u16_s16(svuint16_t zn, svint16x2_t zm) __arm_streamin // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za16_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za16,_f16_f16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za16,_f16_f16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za16_f16_f16( @@ -378,7 +378,7 @@ void test_svmop4a_1x2_za16_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za16_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za16,_f16_f16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za16,_f16_f16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za32_f32_f32( @@ -392,7 +392,7 @@ void test_svmop4s_1x2_za16_f16_f16(svfloat16_t zn, svfloat16x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za32_f32_f32(svfloat32_t zn, svfloat32x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za32,_f32_f32)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za32,_f32_f32)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za32_f32_f32( @@ -406,7 +406,7 @@ void test_svmop4a_1x2_za32_f32_f32(svfloat32_t zn, svfloat32x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za32_f32_f32(svfloat32_t zn, svfloat32x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za32,_f32_f32)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za32,_f32_f32)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za64_f64_f64( @@ -420,7 +420,7 @@ void test_svmop4s_1x2_za32_f32_f32(svfloat32_t zn, svfloat32x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za64_f64_f64(svfloat64_t zn, svfloat64x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za64,_f64_f64)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za64,_f64_f64)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za64_f64_f64( @@ -434,7 +434,7 @@ void test_svmop4a_1x2_za64_f64_f64(svfloat64_t zn, svfloat64x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za64_f64_f64(svfloat64_t zn, svfloat64x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za64,_f64_f64)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za64,_f64_f64)(1, zn, zm); } // CHECK-LABEL: @test_svmop4a_1x2_za16_bf16_bf16( @@ -448,7 +448,7 @@ void test_svmop4s_1x2_za64_f64_f64(svfloat64_t zn, svfloat64x2_t zm) __arm_strea // CPP-CHECK-NEXT: ret void // void test_svmop4a_1x2_za16_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4a,_1x2_,za16,_bf16_bf16)(1, zn, zm); + SME_ACLE_FUNC(svmop4a,_1x2,_za16,_bf16_bf16)(1, zn, zm); } // CHECK-LABEL: @test_svmop4s_1x2_za16_bf16_bf16( @@ -462,5 +462,5 @@ void test_svmop4a_1x2_za16_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_s // CPP-CHECK-NEXT: ret void // void test_svmop4s_1x2_za16_bf16_bf16(svbfloat16_t zn, svbfloat16x2_t zm) __arm_streaming __arm_inout("za") { - SME_ACLE_FUNC(svmop4s,_1x2_,za16,_bf16_bf16)(1, zn, zm); + SME_ACLE_FUNC(svmop4s,_1x2,_za16,_bf16_bf16)(1, zn, zm); } diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x1.c b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x1.c index e42ed95b9b52c..cd12aa523f7cb 100644 --- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x1.c +++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x1.c @@ -2,7 +2,7 @@ // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c index 3e9612e3cc582..f5b6c566c2602 100644 --- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c +++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c @@ -3,8 +3,8 @@ // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s +// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
