Author: Alex Voicu Date: 2025-03-26T10:06:21Z New Revision: 1a7402d3d831940fc04cc0fb5731239744ce5435
URL: https://github.com/llvm/llvm-project/commit/1a7402d3d831940fc04cc0fb5731239744ce5435 DIFF: https://github.com/llvm/llvm-project/commit/1a7402d3d831940fc04cc0fb5731239744ce5435.diff LOG: [NFC][Driver][HIP] Fix mixing `amdgcnspirv` and `gfxXXX` via `--offload-arch` (#133024) Due to `amdgcnspirv` piggybacking on the HIPAMDToolchain, it loses its immediately apparent SPIR-Vness, which makes the Driver want to go all the way to Assembly emmission. This was problematic as we were trying to `llvm-link` SPIR-V, before trying to translate it. This patch ensures that we do the right thing and stop at bitcode emission if we are mixing `amdgcnspirv` and concrete targets. Added: Modified: clang/lib/Driver/Driver.cpp clang/test/Driver/hip-toolchain-no-rdc.hip Removed: ################################################################################ diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 056bfcf1b739a..07e36ea2efba4 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -3750,9 +3750,12 @@ class OffloadingActionBuilder final { // compiler phases, including backend and assemble phases. ActionList AL; Action *BackendAction = nullptr; - if (ToolChains.front()->getTriple().isSPIRV()) { + if (ToolChains.front()->getTriple().isSPIRV() || + (ToolChains.front()->getTriple().isAMDGCN() && + GpuArchList[I] == StringRef("amdgcnspirv"))) { // Emit LLVM bitcode for SPIR-V targets. SPIR-V device tool chain - // (HIPSPVToolChain) runs post-link LLVM IR passes. + // (HIPSPVToolChain or HIPAMDToolChain) runs post-link LLVM IR + // passes. types::ID Output = Args.hasArg(options::OPT_S) ? types::TY_LLVM_IR : types::TY_LLVM_BC; diff --git a/clang/test/Driver/hip-toolchain-no-rdc.hip b/clang/test/Driver/hip-toolchain-no-rdc.hip index 054db261d8e57..6c69d1d51a260 100644 --- a/clang/test/Driver/hip-toolchain-no-rdc.hip +++ b/clang/test/Driver/hip-toolchain-no-rdc.hip @@ -187,8 +187,8 @@ // Check mixed AMDGCNSPIRV and concrete GPU arch. // -// AMDGCNSPIRV: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}}"-emit-obj" {{.*}} "-o" "[[AMDGCNSPV_OBJ:.*o]]" -// AMDGCNSPIRV: {{".*llvm-link.*"}} "-o" "[[AMDGCNSPV_TMP:.*out]]" "[[AMDGCNSPV_OBJ]]" +// AMDGCNSPIRV: "-cc1" "-triple" "spirv64-amd-amdhsa" {{.*}}"-emit-llvm-bc" {{.*}} "-o" "[[AMDGCNSPV_BC:.*bc]]" +// AMDGCNSPIRV: {{".*llvm-link.*"}} "-o" "[[AMDGCNSPV_TMP:.*out]]" "[[AMDGCNSPV_BC]]" // AMDGCNSPIRV: {{".*llvm-spirv.*"}} "--spirv-max-version=1.6" "--spirv-ext=+all" {{.*}} "[[AMDGCNSPV_TMP]]" {{.*}}"-o" "[[AMDGCNSPV_CO:.*out]]" // AMDGCNSPIRV: "-cc1" "-triple" "amdgcn-amd-amdhsa" {{.*}}"-emit-obj" {{.*}}"-target-cpu" "gfx900"{{.*}} "-o" "[[GFX900_OBJ:.*o]]" // AMDGCNSPIRV: {{".*lld.*"}} {{.*}}"-plugin-opt=mcpu=gfx900" {{.*}} "-o" "[[GFX900_CO:.*out]]" {{.*}}"[[GFX900_OBJ]]" _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
