https://github.com/metkarpoonam updated
https://github.com/llvm/llvm-project/pull/131900
>From 7ef40ee7d88872dbee1345cbd822e4aed8a22626 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Tue, 18 Mar 2025 11:30:15 -0700
Subject: [PATCH 1/8] Add codegen tests, Sema tests, SPIR-V backend test case,
and apply clang formatting
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 18 ++++++
clang/test/CodeGenHLSL/builtins/asint16.hlsl | 48 ++++++++++++++++
.../SemaHLSL/BuiltIns/asint16-errors.hlsl | 29 ++++++++++
.../CodeGen/SPIRV/hlsl-intrinsics/asint16.ll | 55 +++++++++++++++++++
4 files changed, 150 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/asint16.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index a48a8e998a015..e0366693deae0 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -80,6 +80,24 @@ void asuint(double3, out uint3, out uint3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_splitdouble)
void asuint(double4, out uint4, out uint4);
+//===----------------------------------------------------------------------===//
+// asint16 builtins
+//===----------------------------------------------------------------------===//
+
+/// \fn int16_t asint16(T Val)
+/// \brief Interprets the bit pattern of x as an 16-bit integer.
+/// \param Val The input value.
+#ifdef __HLSL_ENABLE_16_BIT
+
+template <typename T, int N> constexpr vector<int16_t, N> asint16(vector<T, N>
V) {
+ return __detail::bit_cast<int16_t, T, N>(V);
+}
+
+template <typename T> constexpr int16_t asint16(T F) {
+ return __detail::bit_cast<int16_t, T>(F);
+}
+#endif
+
//===----------------------------------------------------------------------===//
// distance builtins
//===----------------------------------------------------------------------===//
diff --git a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
new file mode 100644
index 0000000000000..0cd6ee63fa078
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
@@ -0,0 +1,48 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - |
FileCheck %s
+// CHECK: define {{.*}}test_ints{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+// CHECK-NOT: bitcast
+// CHECK: ret i16 [[VAL]]
+int16_t test_int(int16_t p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_uint{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret i16 [[VAL]]
+int16_t test_uint(uint16_t p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_half{{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16
+//CHECK : ret i16 [[RES]]
+int16_t test_half(half p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_vector_int{{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_int(int16_t4 p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_vector_uint{{.*}}(<4 x i16> {{.*}}
[[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_uint(uint16_t4 p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}fn{{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>
+//CHECK: ret <4 x i16> [[RES]]
+int16_t4 fn(half4 p1)
+{
+ return asint16(p1);
+}
\ No newline at end of file
diff --git a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
new file mode 100644
index 0000000000000..03a3e46bd1d46
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -verify
+
+
+int16_t4 test_asint_too_many_arg(uint16_t p0, uint16_t p1)
+{
+ return asint16(p0, p1);
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate function template not
viable: requires single argument 'V', but 2 arguments were provided}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate function template not
viable: requires single argument 'F', but 2 arguments were provided}}
+}
+
+
+int16_t test_asint_int(int p1)
+{
+ return asint16(p1);
+ // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
+ // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<int>'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<int, N>' against 'int'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = int]: no type named 'Type'}}
+}
+
+int16_t test_asint_float(float p1)
+{
+ return asint16(p1);
+ // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
+ // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<float>'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<float, N>' against 'float'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = float]: no type named 'Type'}}
+}
\ No newline at end of file
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
new file mode 100644
index 0000000000000..4c3c4337bc62a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
@@ -0,0 +1,55 @@
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpCapability Int16
+; CHECK: OpCapability Float16
+; CHECK-DAG: %[[#int_16:]] = OpTypeInt 16 0
+; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
+; CHECK-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
+; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
+
+
+define i16 @test_int16(i16 returned %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#int_16]]
+ ; CHECK: OpReturnValue %[[#arg0]]
+ ret i16 %p0
+}
+
+define i16 @test_half(half nofpclass(nan inf) %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_16:]]
+ ; CHECK: %[[#]] = OpBitcast %[[#int_16]] %[[#arg0]]
+ %0 = bitcast half %p0 to i16
+ ;CHECK: OpReturnValue %[[#]]
+ ret i16 %0
+
+}
+
+; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+define <4 x i16> @test_vector_int4(<4 x i16> returned %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
+ ; CHECK: OpReturnValue %[[#arg0]]
+ ret <4 x i16> %p0
+}
+
+; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
+ ; CHECK: %[[#]] = OpBitcast %[[#vec4_int_16]] %[[#arg0]]
+ %0 = bitcast <4 x half> %p1 to <4 x i16>
+ ;CHECK: OpReturnValue %[[#]]
+ ret <4 x i16> %0
+}
+
+attributes #0 = { alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none) "approx-func-fp-math"="true" "no-infs-fp-math"="true"
"no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true"
"no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+
+!llvm.module.flags = !{!0}
+!dx.valver = !{!1}
+!llvm.ident = !{!2}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 1, i32 8}
+!2 = !{!"clang version 21.0.0git (https://github.com/llvm/llvm-project.git
5929de8c7731748bf58ad9b1fedfed75e7aae455)"}
\ No newline at end of file
>From 8bb3c41dcee59b15846765590132b539bf54cbe2 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Tue, 18 Mar 2025 11:30:15 -0700
Subject: [PATCH 2/8] Add codegen tests, Sema tests, SPIR-V backend test case,
and apply clang formatting
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 18 ++++++
clang/test/CodeGenHLSL/builtins/asint16.hlsl | 48 ++++++++++++++++
.../SemaHLSL/BuiltIns/asint16-errors.hlsl | 29 ++++++++++
.../CodeGen/SPIRV/hlsl-intrinsics/asint16.ll | 55 +++++++++++++++++++
4 files changed, 150 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/asint16.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index a48a8e998a015..e0366693deae0 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -80,6 +80,24 @@ void asuint(double3, out uint3, out uint3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_splitdouble)
void asuint(double4, out uint4, out uint4);
+//===----------------------------------------------------------------------===//
+// asint16 builtins
+//===----------------------------------------------------------------------===//
+
+/// \fn int16_t asint16(T Val)
+/// \brief Interprets the bit pattern of x as an 16-bit integer.
+/// \param Val The input value.
+#ifdef __HLSL_ENABLE_16_BIT
+
+template <typename T, int N> constexpr vector<int16_t, N> asint16(vector<T, N>
V) {
+ return __detail::bit_cast<int16_t, T, N>(V);
+}
+
+template <typename T> constexpr int16_t asint16(T F) {
+ return __detail::bit_cast<int16_t, T>(F);
+}
+#endif
+
//===----------------------------------------------------------------------===//
// distance builtins
//===----------------------------------------------------------------------===//
diff --git a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
new file mode 100644
index 0000000000000..0cd6ee63fa078
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
@@ -0,0 +1,48 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - |
FileCheck %s
+// CHECK: define {{.*}}test_ints{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+// CHECK-NOT: bitcast
+// CHECK: ret i16 [[VAL]]
+int16_t test_int(int16_t p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_uint{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret i16 [[VAL]]
+int16_t test_uint(uint16_t p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_half{{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16
+//CHECK : ret i16 [[RES]]
+int16_t test_half(half p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_vector_int{{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_int(int16_t4 p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}test_vector_uint{{.*}}(<4 x i16> {{.*}}
[[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_uint(uint16_t4 p0)
+{
+ return asint16(p0);
+}
+
+//CHECK: define {{.*}}fn{{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>
+//CHECK: ret <4 x i16> [[RES]]
+int16_t4 fn(half4 p1)
+{
+ return asint16(p1);
+}
\ No newline at end of file
diff --git a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
new file mode 100644
index 0000000000000..03a3e46bd1d46
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -verify
+
+
+int16_t4 test_asint_too_many_arg(uint16_t p0, uint16_t p1)
+{
+ return asint16(p0, p1);
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate function template not
viable: requires single argument 'V', but 2 arguments were provided}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate function template not
viable: requires single argument 'F', but 2 arguments were provided}}
+}
+
+
+int16_t test_asint_int(int p1)
+{
+ return asint16(p1);
+ // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
+ // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<int>'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<int, N>' against 'int'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = int]: no type named 'Type'}}
+}
+
+int16_t test_asint_float(float p1)
+{
+ return asint16(p1);
+ // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
+ // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<float>'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<float, N>' against 'float'}}
+ // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = float]: no type named 'Type'}}
+}
\ No newline at end of file
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
new file mode 100644
index 0000000000000..4c3c4337bc62a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
@@ -0,0 +1,55 @@
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpCapability Int16
+; CHECK: OpCapability Float16
+; CHECK-DAG: %[[#int_16:]] = OpTypeInt 16 0
+; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
+; CHECK-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
+; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
+
+
+define i16 @test_int16(i16 returned %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#int_16]]
+ ; CHECK: OpReturnValue %[[#arg0]]
+ ret i16 %p0
+}
+
+define i16 @test_half(half nofpclass(nan inf) %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_16:]]
+ ; CHECK: %[[#]] = OpBitcast %[[#int_16]] %[[#arg0]]
+ %0 = bitcast half %p0 to i16
+ ;CHECK: OpReturnValue %[[#]]
+ ret i16 %0
+
+}
+
+; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+define <4 x i16> @test_vector_int4(<4 x i16> returned %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
+ ; CHECK: OpReturnValue %[[#arg0]]
+ ret <4 x i16> %p0
+}
+
+; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
+ ; CHECK: %[[#]] = OpBitcast %[[#vec4_int_16]] %[[#arg0]]
+ %0 = bitcast <4 x half> %p1 to <4 x i16>
+ ;CHECK: OpReturnValue %[[#]]
+ ret <4 x i16> %0
+}
+
+attributes #0 = { alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none) "approx-func-fp-math"="true" "no-infs-fp-math"="true"
"no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true"
"no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+
+!llvm.module.flags = !{!0}
+!dx.valver = !{!1}
+!llvm.ident = !{!2}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 1, i32 8}
+!2 = !{!"clang version 21.0.0git (https://github.com/llvm/llvm-project.git
5929de8c7731748bf58ad9b1fedfed75e7aae455)"}
\ No newline at end of file
>From 9254f63e32162487a0c95d394f3e966ddf744d74 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Tue, 18 Mar 2025 13:09:17 -0700
Subject: [PATCH 3/8] Apply clang formatting and address review comments
---
clang/test/CodeGenHLSL/builtins/asint16.hlsl | 2 +-
clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl | 2 +-
llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
index 0cd6ee63fa078..7c06451eb3ea8 100644
--- a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
@@ -45,4 +45,4 @@ int16_t4 test_vector_uint(uint16_t4 p0)
int16_t4 fn(half4 p1)
{
return asint16(p1);
-}
\ No newline at end of file
+}
diff --git a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
index 03a3e46bd1d46..044c48274b7d9 100644
--- a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
+++ b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
@@ -26,4 +26,4 @@ int16_t test_asint_float(float p1)
// expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<float>'}}
// expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<float, N>' against 'float'}}
// expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = float]: no type named 'Type'}}
-}
\ No newline at end of file
+}
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
index 4c3c4337bc62a..c64507cba82ca 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
@@ -52,4 +52,4 @@ attributes #0 = { alwaysinline mustprogress nofree norecurse
nosync nounwind wil
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 1, i32 8}
-!2 = !{!"clang version 21.0.0git (https://github.com/llvm/llvm-project.git
5929de8c7731748bf58ad9b1fedfed75e7aae455)"}
\ No newline at end of file
+!2 = !{!"clang version 21.0.0git (https://github.com/llvm/llvm-project.git
5929de8c7731748bf58ad9b1fedfed75e7aae455)"}
>From 7a391b850dd1d9b4d82e572c04df1373d74e4ce1 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Tue, 18 Mar 2025 13:18:35 -0700
Subject: [PATCH 4/8] Apply clang format to hlsl_intrinsics.h
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index e0366693deae0..e1074eebd465c 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -89,7 +89,8 @@ void asuint(double4, out uint4, out uint4);
/// \param Val The input value.
#ifdef __HLSL_ENABLE_16_BIT
-template <typename T, int N> constexpr vector<int16_t, N> asint16(vector<T, N>
V) {
+template <typename T, int N>
+constexpr vector<int16_t, N> asint16(vector<T, N> V) {
return __detail::bit_cast<int16_t, T, N>(V);
}
>From 4944aafc05e1d7429ab5793623ab2b76c13c6fce Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Wed, 19 Mar 2025 17:21:38 -0700
Subject: [PATCH 5/8] Apply clang-format on hlsl_intrinsic.h
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index e1074eebd465c..d4321aa4e0d30 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -90,11 +90,20 @@ void asuint(double4, out uint4, out uint4);
#ifdef __HLSL_ENABLE_16_BIT
template <typename T, int N>
-constexpr vector<int16_t, N> asint16(vector<T, N> V) {
+constexpr __detail::enable_if_t<__detail::is_same<int16_t, T>::value ||
+ __detail::is_same<uint16_t, T>::value ||
+ __detail::is_same<half, T>::value,
+ vector<int16_t, N>>
+asint16(vector < T, N > V) {
return __detail::bit_cast<int16_t, T, N>(V);
}
-template <typename T> constexpr int16_t asint16(T F) {
+template <typename T>
+constexpr __detail::enable_if_t<__detail::is_same<int16_t, T>::value ||
+ __detail::is_same<uint16_t, T>::value ||
+ __detail::is_same<half, T>::value,
+ int16_t>
+asint16(T F) {
return __detail::bit_cast<int16_t, T>(F);
}
#endif
>From c7786ac715a63b36f4081c52b6b743faf06b3ac4 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Wed, 19 Mar 2025 17:40:53 -0700
Subject: [PATCH 6/8] Modify asint16-error and added vector test cases to
bitcast.ll
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 2 +-
clang/test/CodeGenHLSL/builtins/asint16.hlsl | 1 +
.../SemaHLSL/BuiltIns/asint16-errors.hlsl | 35 +++++++++++++------
llvm/test/CodeGen/SPIRV/bitcast.ll | 19 ++++++++++
4 files changed, 45 insertions(+), 12 deletions(-)
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index d4321aa4e0d30..07371358ec7a3 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -94,7 +94,7 @@ constexpr __detail::enable_if_t<__detail::is_same<int16_t,
T>::value ||
__detail::is_same<uint16_t, T>::value ||
__detail::is_same<half, T>::value,
vector<int16_t, N>>
-asint16(vector < T, N > V) {
+asint16(vector<T, N> V) {
return __detail::bit_cast<int16_t, T, N>(V);
}
diff --git a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
index 7c06451eb3ea8..c52c4f56e2353 100644
--- a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
@@ -1,4 +1,5 @@
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - |
FileCheck %s
+
// CHECK: define {{.*}}test_ints{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
// CHECK-NOT: bitcast
// CHECK: ret i16 [[VAL]]
diff --git a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
index 044c48274b7d9..a33168457de16 100644
--- a/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
+++ b/clang/test/SemaHLSL/BuiltIns/asint16-errors.hlsl
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -verify
-int16_t4 test_asint_too_many_arg(uint16_t p0, uint16_t p1)
+int16_t4 test_asint16_too_many_arg(uint16_t p0, uint16_t p1)
{
return asint16(p0, p1);
// expected-error@-1 {{no matching function for call to 'asint16'}}
@@ -9,21 +9,34 @@ int16_t4 test_asint_too_many_arg(uint16_t p0, uint16_t p1)
// expected-note@hlsl/hlsl_intrinsics.h:* {{candidate function template not
viable: requires single argument 'F', but 2 arguments were provided}}
}
+int16_t test_asint16_int(int p1)
+{
+ return asint16(p1);
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
could not match 'vector<T, N>' against 'int'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = int]: no type named 'Type'}}
+}
-int16_t test_asint_int(int p1)
+int16_t test_asint16_float(float p1)
{
return asint16(p1);
- // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
- // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<int>'}}
- // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<int, N>' against 'int'}}
- // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = int]: no type named 'Type'}}
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
could not match 'vector<T, N>' against 'float'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = float]: no type named 'Type'}}
}
-int16_t test_asint_float(float p1)
+int16_t4 test_asint16_vector_int(int4 p1)
{
return asint16(p1);
- // expected-error@hlsl/hlsl_intrinsics.h:* {{no matching function for call
to 'bit_cast'}}
- // expected-note@-2 {{in instantiation of function template specialization
'hlsl::asint16<float>'}}
- // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored: could
not match 'vector<float, N>' against 'float'}}
- // expected-note@hlsl/hlsl_detail.h:* {{candidate template ignored:
substitution failure [with U = int16_t, T = float]: no type named 'Type'}}
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = int, N = 4]: no type named 'Type'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = int4]: no type named 'Type'}}
}
+
+int16_t4 test_asint16_vector_float(float4 p1)
+{
+ return asint16(p1);
+ // expected-error@-1 {{no matching function for call to 'asint16'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = float, N = 4]: no type named 'Type'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored:
substitution failure [with T = float4]: no type named 'Type'}}
+}
\ No newline at end of file
diff --git a/llvm/test/CodeGen/SPIRV/bitcast.ll
b/llvm/test/CodeGen/SPIRV/bitcast.ll
index d6c985dbadcc4..c4f7f2ad8ec37 100644
--- a/llvm/test/CodeGen/SPIRV/bitcast.ll
+++ b/llvm/test/CodeGen/SPIRV/bitcast.ll
@@ -4,6 +4,8 @@
; CHECK-SPIRV-DAG: %[[#TyInt32:]] = OpTypeInt 32 0
; CHECK-SPIRV-DAG: %[[#TyInt16:]] = OpTypeInt 16 0
; CHECK-SPIRV-DAG: %[[#TyHalf:]] = OpTypeFloat 16
+; CHECK-SPIRV-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
+; CHECK-SPIRV-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
; CHECK-SPIRV-DAG: %[[#Arg32:]] = OpFunctionParameter %[[#TyInt32]]
; CHECK-SPIRV-DAG: %[[#Arg16:]] = OpUConvert %[[#TyInt16]] %[[#Arg32]]
; CHECK-SPIRV-DAG: %[[#ValHalf:]] = OpBitcast %[[#TyHalf]] %[[#Arg16:]]
@@ -19,3 +21,20 @@ entry:
%res = bitcast half %val2 to i16
ret i16 %res
}
+
+define <4 x i16> @test_vector_int4(<4 x i16> returned %p0) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
+ ; CHECK: OpReturnValue %[[#arg0]]
+ ret <4 x i16> %p0
+}
+
+; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
+ ; CHECK: %[[#]] = OpBitcast %[[#vec4_int_16]] %[[#arg0]]
+ %0 = bitcast <4 x half> %p1 to <4 x i16>
+ ;CHECK: OpReturnValue %[[#]]
+ ret <4 x i16> %0
+}
>From 6a688c09e8936ba57e00a966378a68f52eacd8b2 Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Wed, 19 Mar 2025 17:52:32 -0700
Subject: [PATCH 7/8] Remove asint16.ll
---
.../CodeGen/SPIRV/hlsl-intrinsics/asint16.ll | 55 -------------------
1 file changed, 55 deletions(-)
delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
deleted file mode 100644
index c64507cba82ca..0000000000000
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asint16.ll
+++ /dev/null
@@ -1,55 +0,0 @@
-; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
-; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
-
-; CHECK: OpCapability Int16
-; CHECK: OpCapability Float16
-; CHECK-DAG: %[[#int_16:]] = OpTypeInt 16 0
-; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
-; CHECK-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
-; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
-
-
-define i16 @test_int16(i16 returned %p0) {
-entry:
- ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#int_16]]
- ; CHECK: OpReturnValue %[[#arg0]]
- ret i16 %p0
-}
-
-define i16 @test_half(half nofpclass(nan inf) %p0) {
-entry:
- ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_16:]]
- ; CHECK: %[[#]] = OpBitcast %[[#int_16]] %[[#arg0]]
- %0 = bitcast half %p0 to i16
- ;CHECK: OpReturnValue %[[#]]
- ret i16 %0
-
-}
-
-; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
-define <4 x i16> @test_vector_int4(<4 x i16> returned %p0) {
-entry:
- ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
- ; CHECK: OpReturnValue %[[#arg0]]
- ret <4 x i16> %p0
-}
-
-; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
-define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
-entry:
- ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
- ; CHECK: %[[#]] = OpBitcast %[[#vec4_int_16]] %[[#arg0]]
- %0 = bitcast <4 x half> %p1 to <4 x i16>
- ;CHECK: OpReturnValue %[[#]]
- ret <4 x i16> %0
-}
-
-attributes #0 = { alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none) "approx-func-fp-math"="true" "no-infs-fp-math"="true"
"no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true"
"no-trapping-math"="true" "stack-protector-buffer-size"="8" }
-
-!llvm.module.flags = !{!0}
-!dx.valver = !{!1}
-!llvm.ident = !{!2}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 1, i32 8}
-!2 = !{!"clang version 21.0.0git (https://github.com/llvm/llvm-project.git
5929de8c7731748bf58ad9b1fedfed75e7aae455)"}
>From e13f78bbe3a69f3337121a8cfb4be8b8826620dc Mon Sep 17 00:00:00 2001
From: Poonam Vilas Metkar <poonammet...@microsoft.com>
Date: Wed, 19 Mar 2025 17:59:10 -0700
Subject: [PATCH 8/8] Remove vector int16 test case
---
llvm/test/CodeGen/SPIRV/bitcast.ll | 8 --------
1 file changed, 8 deletions(-)
diff --git a/llvm/test/CodeGen/SPIRV/bitcast.ll
b/llvm/test/CodeGen/SPIRV/bitcast.ll
index c4f7f2ad8ec37..439ec8fdd1cd0 100644
--- a/llvm/test/CodeGen/SPIRV/bitcast.ll
+++ b/llvm/test/CodeGen/SPIRV/bitcast.ll
@@ -4,7 +4,6 @@
; CHECK-SPIRV-DAG: %[[#TyInt32:]] = OpTypeInt 32 0
; CHECK-SPIRV-DAG: %[[#TyInt16:]] = OpTypeInt 16 0
; CHECK-SPIRV-DAG: %[[#TyHalf:]] = OpTypeFloat 16
-; CHECK-SPIRV-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
; CHECK-SPIRV-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
; CHECK-SPIRV-DAG: %[[#Arg32:]] = OpFunctionParameter %[[#TyInt32]]
; CHECK-SPIRV-DAG: %[[#Arg16:]] = OpUConvert %[[#TyInt16]] %[[#Arg32]]
@@ -22,13 +21,6 @@ entry:
ret i16 %res
}
-define <4 x i16> @test_vector_int4(<4 x i16> returned %p0) {
-entry:
- ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
- ; CHECK: OpReturnValue %[[#arg0]]
- ret <4 x i16> %p0
-}
-
; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
entry:
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