smithp35 wrote: The AArch64 ABI doesn't currently document an equivalent of `__aeabi_read_tp` largely because in the 32-bit world not all targets have a dedicated thread-pointer register.
I've very recently made a pull request to document the AArch64 TLS ABI https://github.com/ARM-software/abi-aa/pull/311 it would be best to see if I can get an agreement with the GNU team about what we should call the function and what the PCS restrictions on it should be [*]. Please could you raise an issue in the ABI https://github.com/ARM-software/abi-aa/issues asking for it to be added? I can do that internally but it will help to know there is a real world use case. [*] The introduction of SVE has had some complications in some TLS resolver functions (https://inbox.sourceware.org/gcc/27c00c76-13cf-7423-c064-dcc573303...@arm.com/ and https://sourceware.org/pipermail/libc-alpha/2019-May/103540.html) that I need to write up in the ABI. In the case of a `__aeabi_read_tp` we may have to say no use of SVE registers without restricting implementations. https://github.com/llvm/llvm-project/pull/130932 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
