https://github.com/4vtomat created
https://github.com/llvm/llvm-project/pull/131261
None
>From 9aa7f5bfd6afed1059cc53806b29d544105a8f8a Mon Sep 17 00:00:00 2001
From: Brandon Wu <brandon...@sifive.com>
Date: Thu, 13 Mar 2025 19:57:29 -0700
Subject: [PATCH] [clang][RISCV] Rename variable name in SemaRISCV. NFC
---
clang/lib/Sema/SemaRISCV.cpp | 39 ++++++++++++++++++------------------
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/clang/lib/Sema/SemaRISCV.cpp b/clang/lib/Sema/SemaRISCV.cpp
index 47660319fa3af..85d71b6408930 100644
--- a/clang/lib/Sema/SemaRISCV.cpp
+++ b/clang/lib/Sema/SemaRISCV.cpp
@@ -666,22 +666,22 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo
&TI,
case RISCVVector::BI__builtin_rvv_vaeskf2_vi_tu:
case RISCVVector::BI__builtin_rvv_vaeskf2_vi:
case RISCVVector::BI__builtin_rvv_vsm4k_vi_tu: {
- QualType Op1Type = TheCall->getArg(0)->getType();
- QualType Op2Type = TheCall->getArg(1)->getType();
- return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op1Type, 128) ||
- CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op2Type, 128) ||
+ QualType Arg0Type = TheCall->getArg(0)->getType();
+ QualType Arg1Type = TheCall->getArg(1)->getType();
+ return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg0Type, 128) ||
+ CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg1Type, 128) ||
SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 31);
}
case RISCVVector::BI__builtin_rvv_vsm3c_vi_tu:
case RISCVVector::BI__builtin_rvv_vsm3c_vi: {
- QualType Op1Type = TheCall->getArg(0)->getType();
- return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op1Type, 256) ||
+ QualType Arg0Type = TheCall->getArg(0)->getType();
+ return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg0Type, 256) ||
SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 31);
}
case RISCVVector::BI__builtin_rvv_vaeskf1_vi:
case RISCVVector::BI__builtin_rvv_vsm4k_vi: {
- QualType Op1Type = TheCall->getArg(0)->getType();
- return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op1Type, 128) ||
+ QualType Arg0Type = TheCall->getArg(0)->getType();
+ return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg0Type, 128) ||
SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 31);
}
case RISCVVector::BI__builtin_rvv_vaesdf_vv:
@@ -706,10 +706,10 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo
&TI,
case RISCVVector::BI__builtin_rvv_vaesz_vs_tu:
case RISCVVector::BI__builtin_rvv_vsm4r_vv_tu:
case RISCVVector::BI__builtin_rvv_vsm4r_vs_tu: {
- QualType Op1Type = TheCall->getArg(0)->getType();
- QualType Op2Type = TheCall->getArg(1)->getType();
- return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op1Type, 128) ||
- CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op2Type, 128);
+ QualType Arg0Type = TheCall->getArg(0)->getType();
+ QualType Arg1Type = TheCall->getArg(1)->getType();
+ return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg0Type, 128) ||
+ CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg1Type, 128);
}
case RISCVVector::BI__builtin_rvv_vsha2ch_vv:
case RISCVVector::BI__builtin_rvv_vsha2cl_vv:
@@ -717,22 +717,23 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo
&TI,
case RISCVVector::BI__builtin_rvv_vsha2ch_vv_tu:
case RISCVVector::BI__builtin_rvv_vsha2cl_vv_tu:
case RISCVVector::BI__builtin_rvv_vsha2ms_vv_tu: {
- QualType Op1Type = TheCall->getArg(0)->getType();
- QualType Op2Type = TheCall->getArg(1)->getType();
- QualType Op3Type = TheCall->getArg(2)->getType();
+ QualType Arg0Type = TheCall->getArg(0)->getType();
+ QualType Arg1Type = TheCall->getArg(1)->getType();
+ QualType Arg2Type = TheCall->getArg(2)->getType();
ASTContext::BuiltinVectorTypeInfo Info =
- Context.getBuiltinVectorTypeInfo(Op1Type->castAs<BuiltinType>());
+ Context.getBuiltinVectorTypeInfo(Arg0Type->castAs<BuiltinType>());
uint64_t ElemSize = Context.getTypeSize(Info.ElementType);
if (ElemSize == 64 && !TI.hasFeature("zvknhb"))
return Diag(TheCall->getBeginLoc(),
diag::err_riscv_builtin_requires_extension)
<< /* IsExtension */ true << TheCall->getSourceRange() <<
"zvknhb";
- return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op1Type,
+ return CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg0Type,
ElemSize * 4) ||
- CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op2Type,
+ CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg1Type,
ElemSize * 4) ||
- CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Op3Type, ElemSize *
4);
+ CheckInvalidVLENandLMUL(TI, TheCall, SemaRef, Arg2Type,
+ ElemSize * 4);
}
case RISCVVector::BI__builtin_rvv_sf_vc_i_se:
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