Author: Lei Huang Date: 2025-03-07T18:27:35-05:00 New Revision: 23a44b925a7599301c5ae92e03dc7e1067385961
URL: https://github.com/llvm/llvm-project/commit/23a44b925a7599301c5ae92e03dc7e1067385961 DIFF: https://github.com/llvm/llvm-project/commit/23a44b925a7599301c5ae92e03dc7e1067385961.diff LOG: [NFC] Add additional checks to test for vec_pack_to_short_fp32 (#130324) Update test in prep for IR changes that will be introduced in https://github.com/llvm/llvm-project/pull/129923 Added: Modified: clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c Removed: ################################################################################ diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c index b55a522ed2608..68d32ee14c8fa 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c @@ -853,10 +853,16 @@ vector unsigned char test73(void) { vector unsigned short test74(void) { // CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float> // CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float> -// CHECK-BE: @llvm.ppc.altivec.vperm +// CHECK-BE: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm +// CHECK-BE-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float> +// CHECK-BE-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16> +// CHECK-BE-NEXT: ret <8 x i16> [[REG2]] // CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float> // CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float> -// CHECK: @llvm.ppc.altivec.vperm +// CHECK: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm +// CHECK-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float> +// CHECK-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16> +// CHECK-NEXT: ret <8 x i16> [[REG2]] return vec_pack_to_short_fp32(vfa, vfb); } vector unsigned int test75(void) { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
