================ @@ -333,6 +397,59 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in { } // hasSideEffects = 0, mayLoad = 0, mayStore = 0 } // Predicates = [HasVendorXqcia, IsRV32] +let Predicates = [HasVendorXqcibm, IsRV32] in { +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in { + def QC_INSBRI : QCIRVInstRI<0b1, simm11, "qc.insbri">; + def QC_INSBI : RVInstIBase<0b001, OPC_CUSTOM_0, (outs GPRNoX0:$rd), + (ins simm5:$imm5, uimm5_plus1:$width, + uimm5:$shamt), "qc.insbi", + "$rd, $imm5, $width, $shamt"> { + bits<5> imm5; + bits<5> shamt; + bits<6> width; + let rs1 = imm5; + let Inst{31-30} = 0b00; + let Inst{29-25} = width{4-0}; + let Inst{24-20} = shamt; + } + def QC_INSB : QCIBitManipRII<0b001, 0b01, GPR, "qc.insb">; + def QC_INSBH : QCIBitManipRII<0b001, 0b10, GPR, "qc.insbh">; + def QC_INSBR : QCIRVInstRR<0b00000, GPR, "qc.insbr">; + def QC_INSBHR : QCIRVInstRR<0b00001, GPR, "qc.insbhr">; + def QC_INSBPR : QCIRVInstRR<0b00010, GPR, "qc.insbpr">; + def QC_INSBPRH : QCIRVInstRR<0b00011, GPR, "qc.insbprh">; + def QC_EXTU : QCIBitManipRII<0b010, 0b00, GPRNoX0, "qc.extu">; + def QC_EXTDU : QCIBitManipRII<0b010, 0b10, GPR, "qc.extdu">; + def QC_EXTDUR : QCIRVInstRR<0b00100, GPR, "qc.extdur">; + def QC_EXTDUPR : QCIRVInstRR<0b00110, GPR, "qc.extdupr">; + def QC_EXTDUPRH : QCIRVInstRR<0b00111, GPR, "qc.extduprh">; + def QC_EXT : QCIBitManipRII<0b010, 0b01, GPRNoX0, "qc.ext">; + def QC_EXTD : QCIBitManipRII<0b010, 0b11, GPR, "qc.extd">; + def QC_EXTDR : QCIRVInstRR<0b00101, GPR, "qc.extdr">; + def QC_EXTDPR : QCIRVInstRR<0b01000, GPR, "qc.extdpr">; + def QC_EXTDPRH : QCIRVInstRR<0b01001, GPR, "qc.extdprh">; + def QC_COMPRESS2 : QCIRVInstI<0b0000, "qc.compress2">; + def QC_COMPRESS3 : QCIRVInstI<0b0001, "qc.compress3">; + def QC_EXPAND2 : QCIRVInstI<0b0010, "qc.expand2">; + def QC_EXPAND3 : QCIRVInstI<0b0011, "qc.expand3">; + def QC_CLO : QCIRVInstI<0b0100, "qc.clo">; + def QC_CTO : QCIRVInstI<0b0101, "qc.cto">; + def QC_BREV32 : QCIRVInstI<0b0110, "qc.brev32">; + def QC_C_BEXTI : QCI_RVInst16CB_BM<0b00, "qc.c.bexti">; + def QC_C_BSETI : QCI_RVInst16CB_BM<0b01, "qc.c.bseti">; + def QC_C_EXTU : RVInst16CI<0b000, 0b10, (outs GPRNoX0:$rd_wb), + (ins GPRNoX0:$rd, uimm5ge6_plus1:$width), + "qc.c.extu", "$rd, $width"> { + bits<5> rd; + bits<5> width; + let Constraints = "$rd = $rd_wb"; + let Inst{6-2} = width{4-0}; ---------------- hchandel wrote:
Done. https://github.com/llvm/llvm-project/pull/129504 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits