github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 6684a5970e74b8b4c0c83361a90e25dae9646db0
a90aa31f9a0cb4b050dfa0eeefa499b09b4b0b71 --extensions c,h,cpp --
clang/test/Driver/print-supported-extensions-riscv.c
clang/test/Preprocessor/riscv-target-features.c
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp llvm/lib/Target/RISCV/RISCVInstrInfo.h
llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 4d3556c666..57e50fcd8b 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -743,7 +743,7 @@ public:
bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
Imm = fixImmediateForRV32(Imm, isRV64Imm());
return IsConstantImm && ((isUInt<5>(Imm) && Imm != 0) || Imm == -1) &&
- VK == RISCVMCExpr::VK_RISCV_None;
+ VK == RISCVMCExpr::VK_RISCV_None;
}
bool isUImm5GT3() const {
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 2a35af84c6..57b53c8b5e 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -352,8 +352,8 @@ static DecodeStatus decodeUImmNonZeroOperand(MCInst &Inst,
uint32_t Imm,
template <unsigned N>
static DecodeStatus decodeUImmZibimmOperand(MCInst &Inst, uint32_t Imm,
- int64_t Address,
- const MCDisassembler *Decoder) {
+ int64_t Address,
+ const MCDisassembler *Decoder) {
assert(isUInt<N>(Imm) && "Invalid immediate");
if (Imm)
Inst.addOperand(MCOperand::createImm(Imm));
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 0a8c1f3609..439d3d7ad9 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -957,16 +957,21 @@ static void parseCondBranch(MachineInstr &LastInst,
MachineBasicBlock *&Target,
Cond.push_back(LastInst.getOperand(1));
}
-unsigned RISCVCC::getBrCond(const RISCVSubtarget& STI, RISCVCC::CondCode CC,
bool Imm) {
+unsigned RISCVCC::getBrCond(const RISCVSubtarget &STI, RISCVCC::CondCode CC,
+ bool Imm) {
switch (CC) {
default:
llvm_unreachable("Unknown condition code!");
case RISCVCC::COND_EQ:
- return Imm ? (STI.hasStdExtZibimm() ? RISCV::BEQI :
- (STI.hasVendorXCVbi() ? RISCV::CV_BEQIMM : RISCV::BEQ)) :
RISCV::BEQ;
+ return Imm ? (STI.hasStdExtZibimm()
+ ? RISCV::BEQI
+ : (STI.hasVendorXCVbi() ? RISCV::CV_BEQIMM : RISCV::BEQ))
+ : RISCV::BEQ;
case RISCVCC::COND_NE:
- return Imm ? (STI.hasStdExtZibimm() ? RISCV::BNEI :
- (STI.hasVendorXCVbi() ? RISCV::CV_BNEIMM : RISCV::BNE)) :
RISCV::BNE;
+ return Imm ? (STI.hasStdExtZibimm()
+ ? RISCV::BNEI
+ : (STI.hasVendorXCVbi() ? RISCV::CV_BNEIMM : RISCV::BNE))
+ : RISCV::BNE;
case RISCVCC::COND_LT:
return RISCV::BLT;
case RISCVCC::COND_GE:
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h
b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
index c91fefa566..d95655562a 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
@@ -45,7 +45,7 @@ enum CondCode {
};
CondCode getOppositeBranchCondition(CondCode);
-unsigned getBrCond(const RISCVSubtarget& STI, CondCode CC, bool Imm = false);
+unsigned getBrCond(const RISCVSubtarget &STI, CondCode CC, bool Imm = false);
} // end of namespace RISCVCC
``````````
</details>
https://github.com/llvm/llvm-project/pull/127463
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