Author: Koakuma Date: 2025-02-13T10:22:31+07:00 New Revision: 30a9941624350523535bdec201c895698c171afd
URL: https://github.com/llvm/llvm-project/commit/30a9941624350523535bdec201c895698c171afd DIFF: https://github.com/llvm/llvm-project/commit/30a9941624350523535bdec201c895698c171afd.diff LOG: [SPARC][IAS] Add IAS flag handling for ISA levels Add IAS flag handling for ISA levels we support in LLVM. Reviewers: MaskRay, rorth, brad0, s-barannikov Reviewed By: MaskRay Pull Request: https://github.com/llvm/llvm-project/pull/125151 Added: clang/test/Driver/sparc-ias-Wa.s Modified: clang/lib/Driver/ToolChains/Clang.cpp Removed: ################################################################################ diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 5deafa2ad0f4a..8fe76de7ff0f0 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -2633,6 +2633,7 @@ static void CollectArgsForIntegratedAssembler(Compilation &C, bool UseNoExecStack = false; bool Msa = false; const char *MipsTargetFeature = nullptr; + llvm::SmallVector<const char *> SparcTargetFeatures; StringRef ImplicitIt; for (const Arg *A : Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler, @@ -2778,6 +2779,31 @@ static void CollectArgsForIntegratedAssembler(Compilation &C, if (MipsTargetFeature) continue; break; + + case llvm::Triple::sparc: + case llvm::Triple::sparcel: + case llvm::Triple::sparcv9: + if (Value == "--undeclared-regs") { + // LLVM already allows undeclared use of G registers, so this option + // becomes a no-op. This solely exists for GNU compatibility. + // TODO implement --no-undeclared-regs + continue; + } + SparcTargetFeatures = + llvm::StringSwitch<llvm::SmallVector<const char *>>(Value) + .Case("-Av8", {"-v8plus"}) + .Case("-Av8plus", {"+v8plus", "+v9"}) + .Case("-Av8plusa", {"+v8plus", "+v9", "+vis"}) + .Case("-Av8plusb", {"+v8plus", "+v9", "+vis", "+vis2"}) + .Case("-Av8plusd", {"+v8plus", "+v9", "+vis", "+vis2", "+vis3"}) + .Case("-Av9", {"+v9"}) + .Case("-Av9a", {"+v9", "+vis"}) + .Case("-Av9b", {"+v9", "+vis", "+vis2"}) + .Case("-Av9d", {"+v9", "+vis", "+vis2", "+vis3"}) + .Default({}); + if (!SparcTargetFeatures.empty()) + continue; + break; } if (Value == "-force_cpusubtype_ALL") { @@ -2882,6 +2908,10 @@ static void CollectArgsForIntegratedAssembler(Compilation &C, CmdArgs.push_back("-target-feature"); CmdArgs.push_back(MipsTargetFeature); } + for (const char *Feature : SparcTargetFeatures) { + CmdArgs.push_back("-target-feature"); + CmdArgs.push_back(Feature); + } // forward -fembed-bitcode to assmebler if (C.getDriver().embedBitcodeEnabled() || diff --git a/clang/test/Driver/sparc-ias-Wa.s b/clang/test/Driver/sparc-ias-Wa.s new file mode 100644 index 0000000000000..79456c02935be --- /dev/null +++ b/clang/test/Driver/sparc-ias-Wa.s @@ -0,0 +1,60 @@ +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av8 2>&1 | \ +// RUN: FileCheck -check-prefix=V8 %s +// V8: -cc1as +// V8: "-target-feature" "-v8plus" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av8plus 2>&1 | \ +// RUN: FileCheck -check-prefix=V8PLUS %s +// V8PLUS: -cc1as +// V8PLUS: "-target-feature" "+v8plus" +// V8PLUS: "-target-feature" "+v9" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av8plusa 2>&1 | \ +// RUN: FileCheck -check-prefix=V8PLUSA %s +// V8PLUSA: -cc1as +// V8PLUSA: "-target-feature" "+v8plus" +// V8PLUSA: "-target-feature" "+v9" +// V8PLUSA: "-target-feature" "+vis" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av8plusb 2>&1 | \ +// RUN: FileCheck -check-prefix=V8PLUSB %s +// V8PLUSB: -cc1as +// V8PLUSB: "-target-feature" "+v8plus" +// V8PLUSB: "-target-feature" "+v9" +// V8PLUSB: "-target-feature" "+vis" +// V8PLUSB: "-target-feature" "+vis2" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av8plusd 2>&1 | \ +// RUN: FileCheck -check-prefix=V8PLUSD %s +// V8PLUSD: -cc1as +// V8PLUSD: "-target-feature" "+v8plus" +// V8PLUSD: "-target-feature" "+v9" +// V8PLUSD: "-target-feature" "+vis" +// V8PLUSD: "-target-feature" "+vis2" +// V8PLUSD: "-target-feature" "+vis3" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av9 2>&1 | \ +// RUN: FileCheck -check-prefix=V9 %s +// V9: -cc1as +// V9: "-target-feature" "+v9" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av9a 2>&1 | \ +// RUN: FileCheck -check-prefix=V9A %s +// V9A: -cc1as +// V9A: "-target-feature" "+v9" +// V9A: "-target-feature" "+vis" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av9b 2>&1 | \ +// RUN: FileCheck -check-prefix=V9B %s +// V9B: -cc1as +// V9B: "-target-feature" "+v9" +// V9B: "-target-feature" "+vis" +// V9B: "-target-feature" "+vis2" + +// RUN: %clang --target=sparc-linux-gnu -### -fintegrated-as -c %s -Wa,-Av9d 2>&1 | \ +// RUN: FileCheck -check-prefix=V9D %s +// V9D: -cc1as +// V9D: "-target-feature" "+v9" +// V9D: "-target-feature" "+vis" +// V9D: "-target-feature" "+vis2" +// V9D: "-target-feature" "+vis3" _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
