================
@@ -0,0 +1,40 @@
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s |
FileCheck %s
+
+; CHECK: %dx.types.i32c = type { i32, i1 }
----------------
Icohedron wrote:
Perhaps I made the incorrect assumption that UAddc only accepts scalars. In the
current implementation, UAddc is only used with scalar i32 arguments because
the codegen for AddUint64 only uses the scalar version of the
uadd_with_overflow llvm intrinsic.
The only case where the resulting front-end IR, DXIL, and SPIR-V will differ
from the current implementation is when `AddUint64` receives `uint4` arguments.
With the current version of the PR, I can do a successful end-to-end
compilation of of the [`AddUint64.hlsl`
test](https://github.com/llvm/llvm-project/blob/55f764e23e8b14328192ed05b3d8429f70b22277/clang/test/CodeGenHLSL/builtins/AddUint64.hlsl)
(which uses uint2 and uint4 vectors) using the command:
`build/bin/clang -cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
-emit-llvm -o - | build/bin/opt -S -scalarizer -dxil-op-lower
-mtriple=dxil-pc-shadermodel6.3-library -o -`.
This works because the vector is already scalarized in the clang/front-end
codegen.
I will work on reimplementing AddUint64 for the uint4 case by using vectors,
and make UAddc scalarizable.
https://github.com/llvm/llvm-project/pull/125319
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