================ @@ -0,0 +1,21 @@ +// TYPE sign(TYPE x) { +// if (isnan(x)) { +// return 0.0F; +// } +// if (x > 0.0F) { +// return 1.0F; +// } +// if (x < 0.0F) { +// return -1.0F; +// } +// return x; /* -0.0 or +0.0 */ +// } +_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE __clc_sign(__CLC_GENTYPE x) { + __CLC_BIT_INTN x_isnan = __clc_isnan(x); + __CLC_BIT_INTN x_isgreater_zero = x > __CLC_FP_LIT(0.0); + __CLC_BIT_INTN x_isless_zero = x < __CLC_FP_LIT(0.0); + __CLC_GENTYPE sel0 = __clc_select(x, __CLC_FP_LIT(1.0), x_isgreater_zero); + __CLC_GENTYPE sel1 = __clc_select(sel0, __CLC_FP_LIT(-1.0), x_isless_zero); + __CLC_GENTYPE sel2 = __clc_select(sel1, __CLC_FP_LIT(0.0), x_isnan); + return sel2; +} ---------------- arsenm wrote:
How about this: ``` int sign(float x) { return copysign((__builtin_isnan(x) | (x == 0.0f)) ? 0.0f : 1.0f, x); } ``` produces: ``` define hidden i32 @test_sign(float noundef %x) #0 { entry: %or4 = fcmp ueq float %x, 0.000000e+00 %cond = select i1 %or4, float 0.000000e+00, float 1.000000e+00 %call = tail call float @llvm.copysign.f32(float noundef %cond, float noundef %x) #2 %conv1 = fptosi float %call to i32 ret i32 %conv1 } ``` https://github.com/llvm/llvm-project/pull/115699 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits