https://github.com/flopop01 updated
https://github.com/llvm/llvm-project/pull/123028
>From dbb412b925a01fec354fe0bcadf9db3a766730d7 Mon Sep 17 00:00:00 2001
From: Florin Popa <florin.p...@arm.com>
Date: Wed, 15 Jan 2025 09:15:23 +0000
Subject: [PATCH 1/2] [Clang][Arch]Disable mve.fp when explicit -mfpu option
-mfpu=fpv5-d16 or -mfpu=fpv5-sp-d16 disables the scalar half-precision
floating-point operations feature. Therefore, because the M-profile Vector
Extension (MVE) floating-point feature requires the scalar half-precision
floating-point operations, this option also disables the MVE floating-point
feature, -mve.fp
---
clang/lib/Driver/ToolChains/Arch/ARM.cpp | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index b8181ce6dc012a..cec2c4f24d676d 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -748,6 +748,15 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
Features.push_back("-crc");
}
+ // Invalid value of the __ARM_FEATURE_MVE macro when an explicit -mfpu=
option
+ // disables MVE-FP -mfpu=fpv5-d16 or -mfpu=fpv5-sp-d16 disables the scalar
+ // half-precision floating-point operations feature. Therefore, because the
+ // M-profile Vector Extension (MVE) floating-point feature requires the
scalar
+ // half-precision floating-point operations, this option also disables the
MVE
+ // floating-point feature: -mve.fp
+ if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
+ Features.push_back("-mve.fp");
+
// For Arch >= ARMv8.0 && A or R profile: crypto = sha2 + aes
// Rather than replace within the feature vector, determine whether each
// algorithm is enabled and append this to the end of the vector.
>From a0c98235e18da70a60dcc24066d3da87a65032ee Mon Sep 17 00:00:00 2001
From: Florin Popa <florin.p...@arm.com>
Date: Wed, 15 Jan 2025 09:15:23 +0000
Subject: [PATCH 2/2] [Clang][Arch]Disable mve.fp when explicit -mfpu option
-mfpu=fpv5-d16 or -mfpu=fpv5-sp-d16 disables the scalar half-precision
floating-point operations feature. Therefore, because the M-profile Vector
Extension (MVE) floating-point feature requires the scalar half-precision
floating-point operations, this option also disables the MVE floating-point
feature, -mve.fp
---
clang/test/Preprocessor/arm-target-features.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/clang/test/Preprocessor/arm-target-features.c
b/clang/test/Preprocessor/arm-target-features.c
index 2999ee0d9e4d80..27eb9a322d7c21 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -978,3 +978,11 @@
// CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1
// CHECK-V81-OR-LATER: __ARM_FEATURE_QRDMX 1
// CHECK-BEFORE-V83-NOT: __ARM_FEATURE_COMPLEX 1
+
+// Check if MVE floating-point feature is disabled (-mve.fp) during explicit
fpv5-d16 or fpv5-sp-d16
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp
-mfpu=fpv5-d16 -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE1 %s
+// CHECK-MVE1: #define __ARM_FEATURE_MVE 1
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp
-mfpu=fpv5-sp-d16 -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE1_2 %s
+// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E
-dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
+// CHECK-MVE3: #define __ARM_FEATURE_MVE 3
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
