llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-hexagon Author: Chandler Carruth (chandlerc) <details> <summary>Changes</summary> This switches them to use the common builtin TableGen emission. The fancy feature string preprocessor tricks are replaced with a fairly direct translation into TableGen. All of the actual definitions were created using a quite hack-y Python script that was never intended to be productionized. It preserves the order, spacing, and even comments from the original files. For posterity, the script used is here: https://gist.github.com/chandlerc/f53c7d735e33eecf388529bd9a6010df The original `.def` file appears to be generated by some out-of-tree `iset.py` script, which because it is out of tree I couldn't update. It should be very straightforward though to update it to generate a similar structure as was used to produce the `.td` file. In addition to helping move towards TableGen for all of the builtins, these builtins in particular can be *much* more efficiently handled using TableGen when we start emitting string tables for them because it allows de-duplicating all of the feature strings. --- Patch is 315.42 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/123460.diff 7 Files Affected: - (removed) clang/include/clang/Basic/BuiltinsHexagon.def (-173) - (added) clang/include/clang/Basic/BuiltinsHexagon.td (+2143) - (removed) clang/include/clang/Basic/BuiltinsHexagonDep.def (-1970) - (modified) clang/include/clang/Basic/CMakeLists.txt (+4) - (modified) clang/include/clang/Basic/TargetBuiltins.h (+5-5) - (modified) clang/include/module.modulemap (-2) - (modified) clang/lib/Basic/Targets/Hexagon.cpp (+1-1) ``````````diff diff --git a/clang/include/clang/Basic/BuiltinsHexagon.def b/clang/include/clang/Basic/BuiltinsHexagon.def deleted file mode 100644 index adff9f884c0494..00000000000000 --- a/clang/include/clang/Basic/BuiltinsHexagon.def +++ /dev/null @@ -1,173 +0,0 @@ -//===-- BuiltinsHexagon.def - Hexagon Builtin function database --*- C++ -*-==// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file defines the Hexagon-specific builtin function database. Users of -// this file must define the BUILTIN macro to make use of this information. -// -//===----------------------------------------------------------------------===// - -// The format of this database matches clang/Basic/Builtins.def. - -#if defined(BUILTIN) && !defined(TARGET_BUILTIN) -# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) -#endif - -#pragma push_macro("V79") -#define V79 "v79" -#pragma push_macro("V75") -#define V75 "v75|" V79 -#pragma push_macro("V73") -#define V73 "v73|" V75 -#pragma push_macro("V71") -#define V71 "v71|" V73 -#pragma push_macro("V69") -#define V69 "v69|" V71 -#pragma push_macro("V68") -#define V68 "v68|" V69 -#pragma push_macro("V67") -#define V67 "v67|" V68 -#pragma push_macro("V66") -#define V66 "v66|" V67 -#pragma push_macro("V65") -#define V65 "v65|" V66 -#pragma push_macro("V62") -#define V62 "v62|" V65 -#pragma push_macro("V60") -#define V60 "v60|" V62 -#pragma push_macro("V55") -#define V55 "v55|" V60 -#pragma push_macro("V5") -#define V5 "v5|" V55 - -#pragma push_macro("HVXV79") -#define HVXV79 "hvxv79" -#pragma push_macro("HVXV75") -#define HVXV75 "hvxv75|" HVXV79 -#pragma push_macro("HVXV73") -#define HVXV73 "hvxv73|" HVXV75 -#pragma push_macro("HVXV71") -#define HVXV71 "hvxv71|" HVXV73 -#pragma push_macro("HVXV69") -#define HVXV69 "hvxv69|" HVXV71 -#pragma push_macro("HVXV68") -#define HVXV68 "hvxv68|" HVXV69 -#pragma push_macro("HVXV67") -#define HVXV67 "hvxv67|" HVXV68 -#pragma push_macro("HVXV66") -#define HVXV66 "hvxv66|" HVXV67 -#pragma push_macro("HVXV65") -#define HVXV65 "hvxv65|" HVXV66 -#pragma push_macro("HVXV62") -#define HVXV62 "hvxv62|" HVXV65 -#pragma push_macro("HVXV60") -#define HVXV60 "hvxv60|" HVXV62 - - -// The builtins below are not autogenerated from iset.py. -// Make sure you do not overwrite these. -TARGET_BUILTIN(__builtin_SI_to_SXTHI_asrh, "ii", "", V5) -TARGET_BUILTIN(__builtin_brev_ldd, "v*LLi*CLLi*iC", "", V5) -TARGET_BUILTIN(__builtin_brev_ldw, "v*i*Ci*iC", "", V5) -TARGET_BUILTIN(__builtin_brev_ldh, "v*s*Cs*iC", "", V5) -TARGET_BUILTIN(__builtin_brev_lduh, "v*Us*CUs*iC", "", V5) -TARGET_BUILTIN(__builtin_brev_ldb, "v*Sc*CSc*iC", "", V5) -TARGET_BUILTIN(__builtin_brev_ldub, "v*Uc*CUc*iC", "", V5) -TARGET_BUILTIN(__builtin_circ_ldd, "LLi*LLi*LLi*iIi", "", V5) -TARGET_BUILTIN(__builtin_circ_ldw, "i*i*i*iIi", "", V5) -TARGET_BUILTIN(__builtin_circ_ldh, "s*s*s*iIi", "", V5) -TARGET_BUILTIN(__builtin_circ_lduh, "Us*Us*Us*iIi", "", V5) -TARGET_BUILTIN(__builtin_circ_ldb, "c*c*c*iIi", "", V5) -TARGET_BUILTIN(__builtin_circ_ldub, "Uc*Uc*Uc*iIi", "", V5) -TARGET_BUILTIN(__builtin_brev_std, "LLi*CLLi*LLiiC", "", V5) -TARGET_BUILTIN(__builtin_brev_stw, "i*Ci*iiC", "", V5) -TARGET_BUILTIN(__builtin_brev_sth, "s*Cs*iiC", "", V5) -TARGET_BUILTIN(__builtin_brev_sthhi, "s*Cs*iiC", "", V5) -TARGET_BUILTIN(__builtin_brev_stb, "c*Cc*iiC", "", V5) -TARGET_BUILTIN(__builtin_circ_std, "LLi*LLi*LLiiIi", "", V5) -TARGET_BUILTIN(__builtin_circ_stw, "i*i*iiIi", "", V5) -TARGET_BUILTIN(__builtin_circ_sth, "s*s*iiIi", "", V5) -TARGET_BUILTIN(__builtin_circ_sthhi, "s*s*iiIi", "", V5) -TARGET_BUILTIN(__builtin_circ_stb, "c*c*iiIi", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pci, "iv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pci, "iv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pci, "iv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pci, "iv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pci, "iv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pci, "LLiv*IiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pcr, "iv*ivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pcr, "iv*ivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pcr, "iv*ivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pcr, "iv*ivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pcr, "iv*ivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pcr, "LLiv*ivC*", "", V5) - -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pci, "vv*IiiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pci, "vv*IiiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pci, "vv*IiiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pci, "vv*IiiivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pci, "vv*IiiLLivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pcr, "vv*iivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pcr, "vv*iivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pcr, "vv*iivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pcr, "vv*iivC*", "", V5) -TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pcr, "vv*iLLivC*", "", V5) - -TARGET_BUILTIN(__builtin_HEXAGON_prefetch,"vv*","", V5) -TARGET_BUILTIN(__builtin_HEXAGON_A6_vminub_RdP,"LLiLLiLLi","", V62) - -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq,"vV64bv*V16i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq,"vV64bv*V16i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq,"vV64bv*V16i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq,"vV64bv*V16i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq_128B,"vV128bv*V32i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq_128B,"vV128bv*V32i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq_128B,"vV128bv*V32i","", HVXV60) -TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq_128B,"vV128bv*V32i","", HVXV60) - - -// These are only valid on v65 -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt,"V32iV16iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_128B,"V64iV32iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt,"V32iV16iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_128B,"V64iV32iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65") -TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65") - -#include "clang/Basic/BuiltinsHexagonDep.def" - -#pragma pop_macro("HVXV60") -#pragma pop_macro("HVXV62") -#pragma pop_macro("HVXV65") -#pragma pop_macro("HVXV66") -#pragma pop_macro("HVXV67") -#pragma pop_macro("HVXV68") -#pragma pop_macro("HVXV69") -#pragma pop_macro("HVXV71") -#pragma pop_macro("HVXV73") -#pragma pop_macro("HVXV75") -#pragma pop_macro("HVXV79") - -#pragma pop_macro("V5") -#pragma pop_macro("V55") -#pragma pop_macro("V60") -#pragma pop_macro("V62") -#pragma pop_macro("V65") -#pragma pop_macro("V66") -#pragma pop_macro("V67") -#pragma pop_macro("V68") -#pragma pop_macro("V69") -#pragma pop_macro("V71") -#pragma pop_macro("V73") -#pragma pop_macro("V75") -#pragma pop_macro("V79") - -#undef BUILTIN -#undef TARGET_BUILTIN - diff --git a/clang/include/clang/Basic/BuiltinsHexagon.td b/clang/include/clang/Basic/BuiltinsHexagon.td new file mode 100644 index 00000000000000..95b9012bf74f90 --- /dev/null +++ b/clang/include/clang/Basic/BuiltinsHexagon.td @@ -0,0 +1,2143 @@ +//===--- BuiltinsHexagon.td - Hexagon Builtin function defs -----*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the Hexagon-specific builtin function database. +// +//===----------------------------------------------------------------------===// + +include "clang/Basic/BuiltinsBase.td" + +class VFeatures { + string Features; +} + +class V<string version, VFeatures newer> : VFeatures { + let Features = !strconcat("v", version, "|", newer.Features); +} + +let Features = "v79" in def V79 : VFeatures; + +def V75 : V<"75", V79>; +def V73 : V<"73", V75>; +def V71 : V<"71", V73>; +def V69 : V<"69", V71>; +def V68 : V<"68", V69>; +def V67 : V<"67", V68>; +def V66 : V<"66", V67>; +def V65 : V<"65", V66>; +def V62 : V<"62", V65>; +def V60 : V<"60", V62>; +def V55 : V<"55", V60>; +def V5 : V<"5", V55>; + +class HVXVFeatures { + string Features; +} + +class HVXV<string version, HVXVFeatures newer> : HVXVFeatures { + let Features = !strconcat("hvxv", version, "|", newer.Features); +} + +let Features = "hvxv79" in def HVXV79 : HVXVFeatures; + +def HVXV75 : HVXV<"75", HVXV79>; +def HVXV73 : HVXV<"73", HVXV75>; +def HVXV71 : HVXV<"71", HVXV73>; +def HVXV69 : HVXV<"69", HVXV71>; +def HVXV68 : HVXV<"68", HVXV69>; +def HVXV67 : HVXV<"67", HVXV68>; +def HVXV66 : HVXV<"66", HVXV67>; +def HVXV65 : HVXV<"65", HVXV66>; +def HVXV62 : HVXV<"62", HVXV65>; +def HVXV60 : HVXV<"60", HVXV62>; + +class HexagonBuiltin<string prototype> : TargetBuiltin { + let Spellings = ["__builtin_HEXAGON_" # NAME]; + let Prototype = prototype; + let Features = V5.Features; +} + +class HexagonBuiltinNoPrefix<string prototype> : TargetBuiltin { + let Spellings = [NAME]; + let Prototype = prototype; + let Features = V5.Features; +} + +// The builtins below are not autogenerated from iset.py. +// Make sure you do not overwrite these. +def __builtin_SI_to_SXTHI_asrh : HexagonBuiltinNoPrefix<"int(int)">; +def __builtin_brev_ldd : HexagonBuiltinNoPrefix<"void *(long long int * const, long long int *, int const)">; +def __builtin_brev_ldw : HexagonBuiltinNoPrefix<"void *(int * const, int *, int const)">; +def __builtin_brev_ldh : HexagonBuiltinNoPrefix<"void *(short * const, short *, int const)">; +def __builtin_brev_lduh : HexagonBuiltinNoPrefix<"void *(unsigned short * const, unsigned short *, int const)">; +def __builtin_brev_ldb : HexagonBuiltinNoPrefix<"void *(signed char * const, signed char *, int const)">; +def __builtin_brev_ldub : HexagonBuiltinNoPrefix<"void *(unsigned char * const, unsigned char *, int const)">; +def __builtin_circ_ldd : HexagonBuiltinNoPrefix<"long long int *(long long int *, long long int *, int, _Constant int)">; +def __builtin_circ_ldw : HexagonBuiltinNoPrefix<"int *(int *, int *, int, _Constant int)">; +def __builtin_circ_ldh : HexagonBuiltinNoPrefix<"short *(short *, short *, int, _Constant int)">; +def __builtin_circ_lduh : HexagonBuiltinNoPrefix<"unsigned short *(unsigned short *, unsigned short *, int, _Constant int)">; +def __builtin_circ_ldb : HexagonBuiltinNoPrefix<"char *(char *, char *, int, _Constant int)">; +def __builtin_circ_ldub : HexagonBuiltinNoPrefix<"unsigned char *(unsigned char *, unsigned char *, int, _Constant int)">; +def __builtin_brev_std : HexagonBuiltinNoPrefix<"long long int * const(long long int *, long long int, int const)">; +def __builtin_brev_stw : HexagonBuiltinNoPrefix<"int * const(int *, int, int const)">; +def __builtin_brev_sth : HexagonBuiltinNoPrefix<"short * const(short *, int, int const)">; +def __builtin_brev_sthhi : HexagonBuiltinNoPrefix<"short * const(short *, int, int const)">; +def __builtin_brev_stb : HexagonBuiltinNoPrefix<"char * const(char *, int, int const)">; +def __builtin_circ_std : HexagonBuiltinNoPrefix<"long long int *(long long int *, long long int, int, _Constant int)">; +def __builtin_circ_stw : HexagonBuiltinNoPrefix<"int *(int *, int, int, _Constant int)">; +def __builtin_circ_sth : HexagonBuiltinNoPrefix<"short *(short *, int, int, _Constant int)">; +def __builtin_circ_sthhi : HexagonBuiltinNoPrefix<"short *(short *, int, int, _Constant int)">; +def __builtin_circ_stb : HexagonBuiltinNoPrefix<"char *(char *, int, int, _Constant int)">; +def L2_loadrub_pci : HexagonBuiltin<"int(void *, _Constant int, int, void const *)">; +def L2_loadrb_pci : HexagonBuiltin<"int(void *, _Constant int, int, void const *)">; +def L2_loadruh_pci : HexagonBuiltin<"int(void *, _Constant int, int, void const *)">; +def L2_loadrh_pci : HexagonBuiltin<"int(void *, _Constant int, int, void const *)">; +def L2_loadri_pci : HexagonBuiltin<"int(void *, _Constant int, int, void const *)">; +def L2_loadrd_pci : HexagonBuiltin<"long long int(void *, _Constant int, int, void const *)">; +def L2_loadrub_pcr : HexagonBuiltin<"int(void *, int, void const *)">; +def L2_loadrb_pcr : HexagonBuiltin<"int(void *, int, void const *)">; +def L2_loadruh_pcr : HexagonBuiltin<"int(void *, int, void const *)">; +def L2_loadrh_pcr : HexagonBuiltin<"int(void *, int, void const *)">; +def L2_loadri_pcr : HexagonBuiltin<"int(void *, int, void const *)">; +def L2_loadrd_pcr : HexagonBuiltin<"long long int(void *, int, void const *)">; + +def S2_storerb_pci : HexagonBuiltin<"void(void *, _Constant int, int, int, void const *)">; +def S2_storerh_pci : HexagonBuiltin<"void(void *, _Constant int, int, int, void const *)">; +def S2_storerf_pci : HexagonBuiltin<"void(void *, _Constant int, int, int, void const *)">; +def S2_storeri_pci : HexagonBuiltin<"void(void *, _Constant int, int, int, void const *)">; +def S2_storerd_pci : HexagonBuiltin<"void(void *, _Constant int, int, long long int, void const *)">; +def S2_storerb_pcr : HexagonBuiltin<"void(void *, int, int, void const *)">; +def S2_storerh_pcr : HexagonBuiltin<"void(void *, int, int, void const *)">; +def S2_storerf_pcr : HexagonBuiltin<"void(void *, int, int, void const *)">; +def S2_storeri_pcr : HexagonBuiltin<"void(void *, int, int, void const *)">; +def S2_storerd_pcr : HexagonBuiltin<"void(void *, int, long long int, void const *)">; + +def prefetch : HexagonBuiltin<"void(void *)">; +let Features = V62.Features in { + def A6_vminub_RdP : HexagonBuiltin<"long long int(long long int, long long int)">; +} + +let Features = HVXV60.Features in { + def V6_vmaskedstoreq : HexagonBuiltin<"void(_Vector<64, bool>, void *, _Vector<16, int>)">; + def V6_vmaskedstorenq : HexagonBuiltin<"void(_Vector<64, bool>, void *, _Vector<16, int>)">; + def V6_vmaskedstorentq : HexagonBuiltin<"void(_Vector<64, bool>, void *, _Vector<16, int>)">; + def V6_vmaskedstorentnq : HexagonBuiltin<"void(_Vector<64, bool>, void *, _Vector<16, int>)">; + def V6_vmaskedstoreq_128B : HexagonBuiltin<"void(_Vector<128, bool>, void *, _Vector<32, int>)">; + def V6_vmaskedstorenq_128B : HexagonBuiltin<"void(_Vector<128, bool>, void *, _Vector<32, int>)">; + def V6_vmaskedstorentq_128B : HexagonBuiltin<"void(_Vector<128, bool>, void *, _Vector<32, int>)">; + def V6_vmaskedstorentnq_128B : HexagonBuiltin<"void(_Vector<128, bool>, void *, _Vector<32, int>)">; +} + + +// These are only valid on v65 +let Features = "hvxv65" in { + def V6_vrmpybub_rtt : HexagonBuiltin<"_Vector<32, int>(_Vector<16, int>, long long int)">; + def V6_vrmpybub_rtt_128B : HexagonBuiltin<"_Vector<64, int>(_Vector<32, int>, long long int)">; + def V6_vrmpybub_rtt_acc : HexagonBuiltin<"_Vector<32, int>(_Vector<32, int>, _Vector<16, int>, long long int)">; + def V6_vrmpybub_rtt_acc_128B : HexagonBuiltin<"_Vector<64, int>(_Vector<64, int>, _Vector<32, int>, long long int)">; + def V6_vrmpyub_rtt : HexagonBuiltin<"_Vector<32, int>(_Vector<16, int>, long long int)">; + def V6_vrmpyub_rtt_128B : HexagonBuiltin<"_Vector<64, int>(_Vector<32, int>, long long int)">; + def V6_vrmpyub_rtt_acc : HexagonBuiltin<"_Vector<32, int>(_Vector<32, int>, _Vector<16, int>, long long int)">; + def V6_vrmpyub_rtt_acc_128B : HexagonBuiltin<"_Vector<64, int>(_Vector<64, int>, _Vector<32, int>, long long int)">; +} + +// V5 Scalar Instructions. + +def A2_abs : HexagonBuiltin<"int(int)">; +def A2_absp : HexagonBuiltin<"long long int(long long int)">; +def A2_abssat : HexagonBuiltin<"int(int)">; +def A2_add : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_hh : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_hl : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_lh : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_ll : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_sat_hh : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_sat_hl : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_sat_lh : HexagonBuiltin<"int(int, int)">; +def A2_addh_h16_sat_ll : HexagonBuiltin<"int(int, int)">; +def A2_addh_l16_hl : HexagonBuiltin<"int(int, int)">; +def A2_addh_l16_ll : HexagonBuiltin<"int(int, int)">; +def A2_addh_l16_sat_hl : HexagonBuiltin<"int(int, int)">; +def A2_addh_l16_sat_ll : HexagonBuiltin<"int(int, int)">; +def A2_addi : HexagonBuiltin<"int(int, _Constant int)">; +def A2_addp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_addpsat : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_addsat : HexagonBuiltin<"int(int, int)">; +def A2_addsp : HexagonBuiltin<"long long int(int, long long int)">; +def A2_and : HexagonBuiltin<"int(int, int)">; +def A2_andir : HexagonBuiltin<"int(int, _Constant int)">; +def A2_andp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_aslh : HexagonBuiltin<"int(int)">; +def A2_asrh : HexagonBuiltin<"int(int)">; +def A2_combine_hh : HexagonBuiltin<"int(int, int)">; +def A2_combine_hl : HexagonBuiltin<"int(int, int)">; +def A2_combine_lh : HexagonBuiltin<"int(int, int)">; +def A2_combine_ll : HexagonBuiltin<"int(int, int)">; +def A2_combineii : HexagonBuiltin<"long long int(_Constant int, _Constant int)">; +def A2_combinew : HexagonBuiltin<"long long int(int, int)">; +def A2_max : HexagonBuiltin<"int(int, int)">; +def A2_maxp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_maxu : HexagonBuiltin<"unsigned int(int, int)">; +def A2_maxup : HexagonBuiltin<"unsigned long long int(long long int, long long int)">; +def A2_min : HexagonBuiltin<"int(int, int)">; +def A2_minp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_minu : HexagonBuiltin<"unsigned int(int, int)">; +def A2_minup : HexagonBuiltin<"unsigned long long int(long long int, long long int)">; +def A2_neg : HexagonBuiltin<"int(int)">; +def A2_negp : HexagonBuiltin<"long long int(long long int)">; +def A2_negsat : HexagonBuiltin<"int(int)">; +def A2_not : HexagonBuiltin<"int(int)">; +def A2_notp : HexagonBuiltin<"long long int(long long int)">; +def A2_or : HexagonBuiltin<"int(int, int)">; +def A2_orir : HexagonBuiltin<"int(int, _Constant int)">; +def A2_orp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_roundsat : HexagonBuiltin<"int(long long int)">; +def A2_sat : HexagonBuiltin<"int(long long int)">; +def A2_satb : HexagonBuiltin<"int(int)">; +def A2_sath : HexagonBuiltin<"int(int)">; +def A2_satub : HexagonBuiltin<"int(int)">; +def A2_satuh : HexagonBuiltin<"int(int)">; +def A2_sub : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_hh : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_hl : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_lh : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_ll : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_sat_hh : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_sat_hl : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_sat_lh : HexagonBuiltin<"int(int, int)">; +def A2_subh_h16_sat_ll : HexagonBuiltin<"int(int, int)">; +def A2_subh_l16_hl : HexagonBuiltin<"int(int, int)">; +def A2_subh_l16_ll : HexagonBuiltin<"int(int, int)">; +def A2_subh_l16_sat_hl : HexagonBuiltin<"int(int, int)">; +def A2_subh_l16_sat_ll : HexagonBuiltin<"int(int, int)">; +def A2_subp : HexagonBuiltin<"long long int(long long int, long long int)">; +def A2_subri : HexagonBuiltin<"int(_Constant int, int)">; +def A2_subsat : HexagonBuiltin<"int(int, int)">; +def A2_svaddh : HexagonBuiltin<"int(int, int)">; +def A2_svaddhs : HexagonBuiltin<"int(int, int)">; +def A2_svadduhs : HexagonBuiltin<"int(int, int)">; +def A2_svavgh : HexagonBuiltin<"int(int, int)">; +def A2_svavghs : HexagonBuiltin<... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/123460 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
