https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/123272
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965 >From 6a17e1af6ca33ebe97cc6c66dd2dee6d3619ae72 Mon Sep 17 00:00:00 2001 From: "Wang, Phoebe" <phoebe.w...@intel.com> Date: Fri, 17 Jan 2025 10:20:59 +0800 Subject: [PATCH] [X86][AVX10.2-MINMAX][NFC] Remove NE[P] from intrinsic and instruction Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965 --- clang/include/clang/Basic/BuiltinsX86.td | 6 +- clang/lib/Headers/avx10_2_512minmaxintrin.h | 18 +-- clang/lib/Headers/avx10_2minmaxintrin.h | 36 +++--- clang/lib/Sema/SemaX86.cpp | 6 +- .../CodeGen/X86/avx10_2_512minmax-builtins.c | 24 ++-- .../CodeGen/X86/avx10_2_512minmax-error.c | 24 ++-- .../test/CodeGen/X86/avx10_2minmax-builtins.c | 48 ++++---- llvm/include/llvm/IR/IntrinsicsX86.td | 8 +- llvm/lib/Target/X86/X86InstrAVX10.td | 4 +- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 6 +- .../X86/avx10_2_512minmax-intrinsics.ll | 38 +++--- .../CodeGen/X86/avx10_2minmax-intrinsics.ll | 76 ++++++------ llvm/test/CodeGen/X86/fminimum-fmaximum.ll | 2 +- .../CodeGen/X86/fminimumnum-fmaximumnum.ll | 2 +- .../MC/Disassembler/X86/avx10.2minmax-32.txt | 108 +++++++++--------- .../MC/Disassembler/X86/avx10.2minmax-64.txt | 108 +++++++++--------- llvm/test/MC/X86/avx10.2minmax-32-att.s | 108 +++++++++--------- llvm/test/MC/X86/avx10.2minmax-32-intel.s | 108 +++++++++--------- llvm/test/MC/X86/avx10.2minmax-64-att.s | 108 +++++++++--------- llvm/test/MC/X86/avx10.2minmax-64-intel.s | 108 +++++++++--------- llvm/test/TableGen/x86-fold-tables.inc | 36 +++--- 21 files changed, 491 insertions(+), 491 deletions(-) diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index 18fc10eb85c027..a6c932967f5280 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -4936,15 +4936,15 @@ let Features = "avx10.2-512,sm4", Attributes = [NoThrow, RequiredVectorWidth<512 } let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in { - def vminmaxnepbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int)">; + def vminmaxbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Constant int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in { - def vminmaxnepbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int)">; + def vminmaxbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Constant int)">; } let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in { - def vminmaxnepbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int)">; + def vminmaxbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Constant int)">; } let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in { diff --git a/clang/lib/Headers/avx10_2_512minmaxintrin.h b/clang/lib/Headers/avx10_2_512minmaxintrin.h index e175365d11df80..fbc7fbadbc6b2d 100644 --- a/clang/lib/Headers/avx10_2_512minmaxintrin.h +++ b/clang/lib/Headers/avx10_2_512minmaxintrin.h @@ -14,22 +14,22 @@ #ifndef __AVX10_2_512MINMAXINTRIN_H #define __AVX10_2_512MINMAXINTRIN_H -#define _mm512_minmaxne_pbh(A, B, C) \ - ((__m512bh)__builtin_ia32_vminmaxnepbf16512( \ - (__v32bf)(__m512bh)(A), (__v32bf)(__m512bh)(A), (int)(C))) +#define _mm512_minmax_pbh(A, B, C) \ + ((__m512bh)__builtin_ia32_vminmaxbf16512((__v32bf)(__m512bh)(A), \ + (__v32bf)(__m512bh)(A), (int)(C))) -#define _mm512_mask_minmaxne_pbh(W, U, A, B, C) \ +#define _mm512_mask_minmax_pbh(W, U, A, B, C) \ ((__m512bh)__builtin_ia32_selectpbf_512( \ (__mmask32)(U), \ - (__v32bf)_mm512_minmaxne_pbh((__v32bf)(__m512bh)(A), \ - (__v32bf)(__m512bh)(B), (int)(C)), \ + (__v32bf)_mm512_minmax_pbh((__v32bf)(__m512bh)(A), \ + (__v32bf)(__m512bh)(B), (int)(C)), \ (__v32bf)(__m512bh)(W))) -#define _mm512_maskz_minmaxne_pbh(U, A, B, C) \ +#define _mm512_maskz_minmax_pbh(U, A, B, C) \ ((__m512bh)__builtin_ia32_selectpbf_512( \ (__mmask32)(U), \ - (__v32bf)_mm512_minmaxne_pbh((__v32bf)(__m512bh)(A), \ - (__v32bf)(__m512bh)(B), (int)(C)), \ + (__v32bf)_mm512_minmax_pbh((__v32bf)(__m512bh)(A), \ + (__v32bf)(__m512bh)(B), (int)(C)), \ (__v32bf) __builtin_bit_cast(__m512bh, _mm512_setzero_ps()))) #define _mm512_minmax_pd(A, B, C) \ diff --git a/clang/lib/Headers/avx10_2minmaxintrin.h b/clang/lib/Headers/avx10_2minmaxintrin.h index a9367e7424658f..8164d49d89f1f9 100644 --- a/clang/lib/Headers/avx10_2minmaxintrin.h +++ b/clang/lib/Headers/avx10_2minmaxintrin.h @@ -14,40 +14,40 @@ #ifndef __AVX10_2MINMAXINTRIN_H #define __AVX10_2MINMAXINTRIN_H -#define _mm_minmaxne_pbh(A, B, C) \ - ((__m128bh)__builtin_ia32_vminmaxnepbf16128( \ - (__m128bh)(__v8bf)(A), (__m128bh)(__v8bf)(B), (int)(C))) +#define _mm_minmax_pbh(A, B, C) \ + ((__m128bh)__builtin_ia32_vminmaxbf16128((__m128bh)(__v8bf)(A), \ + (__m128bh)(__v8bf)(B), (int)(C))) -#define _mm_mask_minmaxne_pbh(W, U, A, B, C) \ +#define _mm_mask_minmax_pbh(W, U, A, B, C) \ ((__m128bh)__builtin_ia32_selectpbf_128( \ (__mmask8)(U), \ - (__v8bf)_mm_minmaxne_pbh((__m128bh)(__v8bf)(A), (__m128bh)(__v8bf)(B), \ - (int)(C)), \ + (__v8bf)_mm_minmax_pbh((__m128bh)(__v8bf)(A), (__m128bh)(__v8bf)(B), \ + (int)(C)), \ (__v8bf)(W))) -#define _mm_maskz_minmaxne_pbh(U, A, B, C) \ +#define _mm_maskz_minmax_pbh(U, A, B, C) \ ((__m128bh)__builtin_ia32_selectpbf_128( \ (__mmask8)(U), \ - (__v8bf)_mm_minmaxne_pbh((__m128bh)(__v8bf)(A), (__m128bh)(__v8bf)(B), \ - (int)(C)), \ + (__v8bf)_mm_minmax_pbh((__m128bh)(__v8bf)(A), (__m128bh)(__v8bf)(B), \ + (int)(C)), \ (__v8bf) __builtin_bit_cast(__m128bh, _mm_setzero_ps()))) -#define _mm256_minmaxne_pbh(A, B, C) \ - ((__m256bh)__builtin_ia32_vminmaxnepbf16256( \ - (__m256bh)(__v16bf)(A), (__m256bh)(__v16bf)(B), (int)(C))) +#define _mm256_minmax_pbh(A, B, C) \ + ((__m256bh)__builtin_ia32_vminmaxbf16256((__m256bh)(__v16bf)(A), \ + (__m256bh)(__v16bf)(B), (int)(C))) -#define _mm256_mask_minmaxne_pbh(W, U, A, B, C) \ +#define _mm256_mask_minmax_pbh(W, U, A, B, C) \ ((__m256bh)__builtin_ia32_selectpbf_256( \ (__mmask16)(U), \ - (__v16bf)_mm256_minmaxne_pbh((__m256bh)(__v16bf)(A), \ - (__m256bh)(__v16bf)(B), (int)(C)), \ + (__v16bf)_mm256_minmax_pbh((__m256bh)(__v16bf)(A), \ + (__m256bh)(__v16bf)(B), (int)(C)), \ (__v16bf)(W))) -#define _mm256_maskz_minmaxne_pbh(U, A, B, C) \ +#define _mm256_maskz_minmax_pbh(U, A, B, C) \ ((__m256bh)__builtin_ia32_selectpbf_256( \ (__mmask16)(U), \ - (__v16bf)_mm256_minmaxne_pbh((__m256bh)(__v16bf)(A), \ - (__m256bh)(__v16bf)(B), (int)(C)), \ + (__v16bf)_mm256_minmax_pbh((__m256bh)(__v16bf)(A), \ + (__m256bh)(__v16bf)(B), (int)(C)), \ (__v16bf) __builtin_bit_cast(__m256bh, _mm256_setzero_ps()))) #define _mm_minmax_pd(A, B, C) \ diff --git a/clang/lib/Sema/SemaX86.cpp b/clang/lib/Sema/SemaX86.cpp index 0b4b78c5b15dc5..01308ba86cc977 100644 --- a/clang/lib/Sema/SemaX86.cpp +++ b/clang/lib/Sema/SemaX86.cpp @@ -1045,9 +1045,9 @@ bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, case X86::BI__builtin_ia32_vpshrdw128: case X86::BI__builtin_ia32_vpshrdw256: case X86::BI__builtin_ia32_vpshrdw512: - case X86::BI__builtin_ia32_vminmaxnepbf16128: - case X86::BI__builtin_ia32_vminmaxnepbf16256: - case X86::BI__builtin_ia32_vminmaxnepbf16512: + case X86::BI__builtin_ia32_vminmaxbf16128: + case X86::BI__builtin_ia32_vminmaxbf16256: + case X86::BI__builtin_ia32_vminmaxbf16512: case X86::BI__builtin_ia32_vminmaxpd128_mask: case X86::BI__builtin_ia32_vminmaxpd256_round_mask: case X86::BI__builtin_ia32_vminmaxph128_mask: diff --git a/clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c b/clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c index 4e80d8b36e1948..4e467b36b2348c 100644 --- a/clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c +++ b/clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c @@ -5,25 +5,25 @@ #include <immintrin.h> -__m512bh test_mm512_minmaxne_pbh(__m512bh __A, __m512bh __B) { - // CHECK-LABEL: @test_mm512_minmaxne_pbh( - // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512( - return _mm512_minmaxne_pbh(__A, __B, 127); +__m512bh test_mm512_minmax_pbh(__m512bh __A, __m512bh __B) { + // CHECK-LABEL: @test_mm512_minmax_pbh( + // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512( + return _mm512_minmax_pbh(__A, __B, 127); } -__m512bh test_mm512_mask_minmaxne_pbh(__m512bh __A, __mmask32 __B, __m512bh __C, __m512bh __D) { - // CHECK-LABEL: @test_mm512_mask_minmaxne_pbh( - // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512( +__m512bh test_mm512_mask_minmax_pbh(__m512bh __A, __mmask32 __B, __m512bh __C, __m512bh __D) { + // CHECK-LABEL: @test_mm512_mask_minmax_pbh( + // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512( // CHECK: select <32 x i1> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}} - return _mm512_mask_minmaxne_pbh(__A, __B, __C, __D, 127); + return _mm512_mask_minmax_pbh(__A, __B, __C, __D, 127); } -__m512bh test_mm512_maskz_minmaxne_pbh(__mmask32 __A, __m512bh __B, __m512bh __C) { - // CHECK-LABEL: @test_mm512_maskz_minmaxne_pbh( - // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512( +__m512bh test_mm512_maskz_minmax_pbh(__mmask32 __A, __m512bh __B, __m512bh __C) { + // CHECK-LABEL: @test_mm512_maskz_minmax_pbh( + // CHECK: call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512( // CHECK: zeroinitializer // CHECK: select <32 x i1> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}} - return _mm512_maskz_minmaxne_pbh(__A, __B, __C, 127); + return _mm512_maskz_minmax_pbh(__A, __B, __C, 127); } __m512d test_mm512_minmax_pd(__m512d __A, __m512d __B) { diff --git a/clang/test/CodeGen/X86/avx10_2_512minmax-error.c b/clang/test/CodeGen/X86/avx10_2_512minmax-error.c index e487c3fad49dd1..6db7801eb00408 100644 --- a/clang/test/CodeGen/X86/avx10_2_512minmax-error.c +++ b/clang/test/CodeGen/X86/avx10_2_512minmax-error.c @@ -5,20 +5,20 @@ #include <immintrin.h> -__m128bh test_mm_minmaxne_pbh(__m128bh __A, __m128bh __B) { - return _mm_minmaxne_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m128bh test_mm_minmax_pbh(__m128bh __A, __m128bh __B) { + return _mm_minmax_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } -__m128bh test_mm_mask_minmaxne_pbh(__m128bh __A, __mmask8 __B, __m128bh __C, __m128bh __D) { - return _mm_mask_minmaxne_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m128bh test_mm_mask_minmax_pbh(__m128bh __A, __mmask8 __B, __m128bh __C, __m128bh __D) { + return _mm_mask_minmax_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } -__m256bh test_mm256_minmaxne_pbh(__m256bh __A, __m256bh __B) { - return _mm256_minmaxne_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m256bh test_mm256_minmax_pbh(__m256bh __A, __m256bh __B) { + return _mm256_minmax_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } -__m256bh test_mm256_mask_minmaxne_pbh(__m256bh __A, __mmask16 __B, __m256bh __C, __m256bh __D) { - return _mm256_mask_minmaxne_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m256bh test_mm256_mask_minmax_pbh(__m256bh __A, __mmask16 __B, __m256bh __C, __m256bh __D) { + return _mm256_mask_minmax_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } __m128d test_mm_minmax_pd(__m128d __A, __m128d __B) { @@ -69,12 +69,12 @@ __m256 test_mm256_mask_minmax_ps(__m256 __A, __mmask8 __B, __m256 __C, __m256 __ return _mm256_mask_minmax_ps(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } -__m512bh test_mm512_minmaxne_pbh(__m512bh __A, __m512bh __B) { - return _mm512_minmaxne_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m512bh test_mm512_minmax_pbh(__m512bh __A, __m512bh __B) { + return _mm512_minmax_pbh(__A, __B, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } -__m512bh test_mm512_mask_minmaxne_pbh(__m512bh __A, __mmask32 __B, __m512bh __C, __m512bh __D) { - return _mm512_mask_minmaxne_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} +__m512bh test_mm512_mask_minmax_pbh(__m512bh __A, __mmask32 __B, __m512bh __C, __m512bh __D) { + return _mm512_mask_minmax_pbh(__A, __B, __C, __D, 256); // expected-error {{argument value 256 is outside the valid range [0, 255]}} } __m512d test_mm512_minmax_pd(__m512d __A, __m512d __B) { diff --git a/clang/test/CodeGen/X86/avx10_2minmax-builtins.c b/clang/test/CodeGen/X86/avx10_2minmax-builtins.c index 1efafe24ab1258..7e21858c718340 100644 --- a/clang/test/CodeGen/X86/avx10_2minmax-builtins.c +++ b/clang/test/CodeGen/X86/avx10_2minmax-builtins.c @@ -5,46 +5,46 @@ #include <immintrin.h> -__m128bh test_mm_minmaxne_pbh(__m128bh __A, __m128bh __B) { - // CHECK-LABEL: @test_mm_minmaxne_pbh( - // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128( - return _mm_minmaxne_pbh(__A, __B, 127); +__m128bh test_mm_minmax_pbh(__m128bh __A, __m128bh __B) { + // CHECK-LABEL: @test_mm_minmax_pbh( + // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128( + return _mm_minmax_pbh(__A, __B, 127); } -__m128bh test_mm_mask_minmaxne_pbh(__m128bh __A, __mmask8 __B, __m128bh __C, __m128bh __D) { - // CHECK-LABEL: @test_mm_mask_minmaxne_pbh( - // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128( +__m128bh test_mm_mask_minmax_pbh(__m128bh __A, __mmask8 __B, __m128bh __C, __m128bh __D) { + // CHECK-LABEL: @test_mm_mask_minmax_pbh( + // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128( // CHECK: select <8 x i1> %{{.*}}, <8 x bfloat> %{{.*}}, <8 x bfloat> %{{.*}} - return _mm_mask_minmaxne_pbh(__A, __B, __C, __D, 127); + return _mm_mask_minmax_pbh(__A, __B, __C, __D, 127); } -__m128bh test_mm_maskz_minmaxne_pbh(__mmask8 __A, __m128bh __B, __m128bh __C) { - // CHECK-LABEL: @test_mm_maskz_minmaxne_pbh( - // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128( +__m128bh test_mm_maskz_minmax_pbh(__mmask8 __A, __m128bh __B, __m128bh __C) { + // CHECK-LABEL: @test_mm_maskz_minmax_pbh( + // CHECK: call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128( // CHECK: zeroinitializer // CHECK: select <8 x i1> %{{.*}}, <8 x bfloat> %{{.*}}, <8 x bfloat> %{{.*}} - return _mm_maskz_minmaxne_pbh(__A, __B, __C, 127); + return _mm_maskz_minmax_pbh(__A, __B, __C, 127); } -__m256bh test_mm256_minmaxne_pbh(__m256bh __A, __m256bh __B) { - // CHECK-LABEL: @test_mm256_minmaxne_pbh( - // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256( - return _mm256_minmaxne_pbh(__A, __B, 127); +__m256bh test_mm256_minmax_pbh(__m256bh __A, __m256bh __B) { + // CHECK-LABEL: @test_mm256_minmax_pbh( + // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256( + return _mm256_minmax_pbh(__A, __B, 127); } -__m256bh test_mm256_mask_minmaxne_pbh(__m256bh __A, __mmask16 __B, __m256bh __C, __m256bh __D) { - // CHECK-LABEL: @test_mm256_mask_minmaxne_pbh( - // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256( +__m256bh test_mm256_mask_minmax_pbh(__m256bh __A, __mmask16 __B, __m256bh __C, __m256bh __D) { + // CHECK-LABEL: @test_mm256_mask_minmax_pbh( + // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256( // CHECK: select <16 x i1> %{{.*}}, <16 x bfloat> %{{.*}}, <16 x bfloat> %{{.*}} - return _mm256_mask_minmaxne_pbh(__A, __B, __C, __D, 127); + return _mm256_mask_minmax_pbh(__A, __B, __C, __D, 127); } -__m256bh test_mm256_maskz_minmaxne_pbh(__mmask16 __A, __m256bh __B, __m256bh __C) { - // CHECK-LABEL: @test_mm256_maskz_minmaxne_pbh( - // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256( +__m256bh test_mm256_maskz_minmax_pbh(__mmask16 __A, __m256bh __B, __m256bh __C) { + // CHECK-LABEL: @test_mm256_maskz_minmax_pbh( + // CHECK: call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256( // CHECK: zeroinitializer // CHECK: select <16 x i1> %{{.*}}, <16 x bfloat> %{{.*}}, <16 x bfloat> %{{.*}} - return _mm256_maskz_minmaxne_pbh(__A, __B, __C, 127); + return _mm256_maskz_minmax_pbh(__A, __B, __C, 127); } __m128d test_mm_minmax_pd(__m128d __A, __m128d __B) { diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 42b211e0e1f75a..182bce35861dc0 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -7279,13 +7279,13 @@ let TargetPrefix = "x86" in { } let TargetPrefix = "x86" in { -def int_x86_avx10_vminmaxnepbf16128 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16128">, +def int_x86_avx10_vminmaxbf16128 : ClangBuiltin<"__builtin_ia32_vminmaxbf16128">, DefaultAttrsIntrinsic<[llvm_v8bf16_ty], [llvm_v8bf16_ty, llvm_v8bf16_ty, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<2>>]>; -def int_x86_avx10_vminmaxnepbf16256 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16256">, +def int_x86_avx10_vminmaxbf16256 : ClangBuiltin<"__builtin_ia32_vminmaxbf16256">, DefaultAttrsIntrinsic<[llvm_v16bf16_ty], [llvm_v16bf16_ty, llvm_v16bf16_ty, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<2>>]>; -def int_x86_avx10_vminmaxnepbf16512 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16512">, +def int_x86_avx10_vminmaxbf16512 : ClangBuiltin<"__builtin_ia32_vminmaxbf16512">, DefaultAttrsIntrinsic<[llvm_v32bf16_ty], [llvm_v32bf16_ty, llvm_v32bf16_ty, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<2>>]>; def int_x86_avx10_vminmaxpd128 : ClangBuiltin<"__builtin_ia32_vminmaxpd128">, @@ -7893,4 +7893,4 @@ def int_x86_movrsdi : ClangBuiltin<"__builtin_ia32_movrsdi">, [IntrReadMem]>; def int_x86_prefetchrs : ClangBuiltin<"__builtin_ia32_prefetchrs">, Intrinsic<[], [llvm_ptr_ty], []>; -} \ No newline at end of file +} diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td index 127016184bc17b..2dffb15718ced3 100644 --- a/llvm/lib/Target/X86/X86InstrAVX10.td +++ b/llvm/lib/Target/X86/X86InstrAVX10.td @@ -447,8 +447,8 @@ multiclass avx10_minmax_scalar<string OpStr, X86VectorVTInfo _, SDNode OpNode, let mayRaiseFPException = 0 in -defm VMINMAXNEPBF16 : avx10_minmax_packed<"vminmaxnepbf16", avx512vl_bf16_info, X86vminmax>, - AVX512XDIi8Base, EVEX_CD8<16, CD8VF>, TA; +defm VMINMAXBF16 : avx10_minmax_packed<"vminmaxbf16", avx512vl_bf16_info, X86vminmax>, + AVX512XDIi8Base, EVEX_CD8<16, CD8VF>, TA; defm VMINMAXPD : avx10_minmax_packed<"vminmaxpd", avx512vl_f64_info, X86vminmax>, avx10_minmax_packed_sae<"vminmaxpd", avx512vl_f64_info, X86vminmaxSae>, diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h index 86fd04046d16a0..430c899b9dd723 100644 --- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h +++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h @@ -848,11 +848,11 @@ static const IntrinsicData IntrinsicsWithoutChain[] = { X86ISD::FMAX_SAE), X86_INTRINSIC_DATA(avx10_vmaxps256, INTR_TYPE_2OP_SAE, X86ISD::FMAX, X86ISD::FMAX_SAE), - X86_INTRINSIC_DATA(avx10_vminmaxnepbf16128, INTR_TYPE_3OP, X86ISD::VMINMAX, + X86_INTRINSIC_DATA(avx10_vminmaxbf16128, INTR_TYPE_3OP, X86ISD::VMINMAX, 0), - X86_INTRINSIC_DATA(avx10_vminmaxnepbf16256, INTR_TYPE_3OP, X86ISD::VMINMAX, + X86_INTRINSIC_DATA(avx10_vminmaxbf16256, INTR_TYPE_3OP, X86ISD::VMINMAX, 0), - X86_INTRINSIC_DATA(avx10_vminmaxnepbf16512, INTR_TYPE_3OP, X86ISD::VMINMAX, + X86_INTRINSIC_DATA(avx10_vminmaxbf16512, INTR_TYPE_3OP, X86ISD::VMINMAX, 0), X86_INTRINSIC_DATA(avx10_vminpd256, INTR_TYPE_2OP_SAE, X86ISD::FMIN, X86ISD::FMIN_SAE), diff --git a/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll index 260451f0f6822d..b7713128f47212 100644 --- a/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll @@ -2,57 +2,57 @@ ; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=X64 ; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=X86 -define <32 x bfloat> @test_int_x86_avx10_vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B) nounwind { -; X64-LABEL: test_int_x86_avx10_vminmaxnepbf16512: +define <32 x bfloat> @test_int_x86_avx10_vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B) nounwind { +; X64-LABEL: test_int_x86_avx10_vminmaxbf16512: ; X64: # %bb.0: -; X64-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf3,0x7f,0x48,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf3,0x7f,0x48,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_vminmaxnepbf16512: +; X86-LABEL: test_int_x86_avx10_vminmaxbf16512: ; X86: # %bb.0: -; X86-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf3,0x7f,0x48,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf3,0x7f,0x48,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] - %ret = call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) + %ret = call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) ret <32 x bfloat> %ret } -define <32 x bfloat> @test_int_x86_avx10_mask_vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, <32 x bfloat> %C, i32 %D) nounwind { -; X64-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16512: +define <32 x bfloat> @test_int_x86_avx10_mask_vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, <32 x bfloat> %C, i32 %D) nounwind { +; X64-LABEL: test_int_x86_avx10_mask_vminmaxbf16512: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x49,0x52,0xd1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x49,0x52,0xd1,0x7f] ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16512: +; X86-LABEL: test_int_x86_avx10_mask_vminmaxbf16512: ; X86: # %bb.0: ; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x49,0x52,0xd1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x49,0x52,0xd1,0x7f] ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) + %0 = call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) %1 = bitcast i32 %D to <32 x i1> %2 = select reassoc nsz arcp contract afn <32 x i1> %1, <32 x bfloat> %0, <32 x bfloat> %C ret <32 x bfloat> %2 } -declare <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 %C) +declare <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 %C) -define <32 x bfloat> @test_int_x86_avx10_maskz_vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 %C) nounwind { -; X64-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16512: +define <32 x bfloat> @test_int_x86_avx10_maskz_vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 %C) nounwind { +; X64-LABEL: test_int_x86_avx10_maskz_vminmaxbf16512: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xc9,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xc9,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16512: +; X86-LABEL: test_int_x86_avx10_maskz_vminmaxbf16512: ; X86: # %bb.0: ; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xc9,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xc9,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <32 x bfloat> @llvm.x86.avx10.vminmaxnepbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) + %0 = call <32 x bfloat> @llvm.x86.avx10.vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B, i32 127) %1 = bitcast i32 %C to <32 x i1> %2 = select reassoc nsz arcp contract afn <32 x i1> %1, <32 x bfloat> %0, <32 x bfloat> zeroinitializer ret <32 x bfloat> %2 diff --git a/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll index fd6a01a4a3b69d..5dc6ec12b3f602 100644 --- a/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll @@ -2,114 +2,114 @@ ; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=X64 ; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=X86 -define <8 x bfloat> @test_int_x86_avx10_vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B) nounwind { -; X64-LABEL: test_int_x86_avx10_vminmaxnepbf16128: +define <8 x bfloat> @test_int_x86_avx10_vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B) nounwind { +; X64-LABEL: test_int_x86_avx10_vminmaxbf16128: ; X64: # %bb.0: -; X64-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf3,0x7f,0x08,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf3,0x7f,0x08,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_vminmaxnepbf16128: +; X86-LABEL: test_int_x86_avx10_vminmaxbf16128: ; X86: # %bb.0: -; X86-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf3,0x7f,0x08,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf3,0x7f,0x08,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] - %ret = call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) + %ret = call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) ret <8 x bfloat> %ret } -define <8 x bfloat> @test_int_x86_avx10_mask_vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, <8 x bfloat> %C, i8 %D) nounwind { -; X64-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16128: +define <8 x bfloat> @test_int_x86_avx10_mask_vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, <8 x bfloat> %C, i8 %D) nounwind { +; X64-LABEL: test_int_x86_avx10_mask_vminmaxbf16128: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x09,0x52,0xd1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x09,0x52,0xd1,0x7f] ; X64-NEXT: vmovdqa %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc2] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16128: +; X86-LABEL: test_int_x86_avx10_mask_vminmaxbf16128: ; X86: # %bb.0: ; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x09,0x52,0xd1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x09,0x52,0xd1,0x7f] ; X86-NEXT: vmovdqa %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc2] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) + %0 = call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) %1 = bitcast i8 %D to <8 x i1> %2 = select reassoc nsz arcp contract afn <8 x i1> %1, <8 x bfloat> %0, <8 x bfloat> %C ret <8 x bfloat> %2 } -declare <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 %C) +declare <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 %C) -define <8 x bfloat> @test_int_x86_avx10_maskz_vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i8 %C) nounwind { -; X64-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16128: +define <8 x bfloat> @test_int_x86_avx10_maskz_vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i8 %C) nounwind { +; X64-LABEL: test_int_x86_avx10_maskz_vminmaxbf16128: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0x89,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0x89,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16128: +; X86-LABEL: test_int_x86_avx10_maskz_vminmaxbf16128: ; X86: # %bb.0: ; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0x89,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0x89,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <8 x bfloat> @llvm.x86.avx10.vminmaxnepbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) + %0 = call <8 x bfloat> @llvm.x86.avx10.vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B, i32 127) %1 = bitcast i8 %C to <8 x i1> %2 = select reassoc nsz arcp contract afn <8 x i1> %1, <8 x bfloat> %0, <8 x bfloat> zeroinitializer ret <8 x bfloat> %2 } -define <16 x bfloat> @test_int_x86_avx10_vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B) nounwind { -; X64-LABEL: test_int_x86_avx10_vminmaxnepbf16256: +define <16 x bfloat> @test_int_x86_avx10_vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B) nounwind { +; X64-LABEL: test_int_x86_avx10_vminmaxbf16256: ; X64: # %bb.0: -; X64-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf3,0x7f,0x28,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf3,0x7f,0x28,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_vminmaxnepbf16256: +; X86-LABEL: test_int_x86_avx10_vminmaxbf16256: ; X86: # %bb.0: -; X86-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf3,0x7f,0x28,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf3,0x7f,0x28,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] entry: - %ret = call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) + %ret = call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) ret <16 x bfloat> %ret } -define <16 x bfloat> @test_int_x86_avx10_mask_vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, <16 x bfloat> %C, i16 %D) nounwind { -; X64-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16256: +define <16 x bfloat> @test_int_x86_avx10_mask_vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, <16 x bfloat> %C, i16 %D) nounwind { +; X64-LABEL: test_int_x86_avx10_mask_vminmaxbf16256: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x29,0x52,0xd1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x29,0x52,0xd1,0x7f] ; X64-NEXT: vmovdqa %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc2] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_mask_vminmaxnepbf16256: +; X86-LABEL: test_int_x86_avx10_mask_vminmaxbf16256: ; X86: # %bb.0: ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x29,0x52,0xd1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0x7f,0x29,0x52,0xd1,0x7f] ; X86-NEXT: vmovdqa %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc2] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) + %0 = call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) %1 = bitcast i16 %D to <16 x i1> %2 = select reassoc nsz arcp contract afn <16 x i1> %1, <16 x bfloat> %0, <16 x bfloat> %C ret <16 x bfloat> %2 } -declare <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 %C) +declare <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 %C) -define <16 x bfloat> @test_int_x86_avx10_maskz_vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i16 %C) nounwind { -; X64-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16256: +define <16 x bfloat> @test_int_x86_avx10_maskz_vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i16 %C) nounwind { +; X64-LABEL: test_int_x86_avx10_maskz_vminmaxbf16256: ; X64: # %bb.0: ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] -; X64-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xa9,0x52,0xc1,0x7f] +; X64-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xa9,0x52,0xc1,0x7f] ; X64-NEXT: retq # encoding: [0xc3] ; -; X86-LABEL: test_int_x86_avx10_maskz_vminmaxnepbf16256: +; X86-LABEL: test_int_x86_avx10_maskz_vminmaxbf16256: ; X86: # %bb.0: ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04] -; X86-NEXT: vminmaxnepbf16 $127, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xa9,0x52,0xc1,0x7f] +; X86-NEXT: vminmaxbf16 $127, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7f,0xa9,0x52,0xc1,0x7f] ; X86-NEXT: retl # encoding: [0xc3] entry: - %0 = call <16 x bfloat> @llvm.x86.avx10.vminmaxnepbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) + %0 = call <16 x bfloat> @llvm.x86.avx10.vminmaxbf16256(<16 x bfloat> %A, <16 x bfloat> %B, i32 127) %1 = bitcast i16 %C to <16 x i1> %2 = select reassoc nsz arcp contract afn <16 x i1> %1, <16 x bfloat> %0, <16 x bfloat> zeroinitializer ret <16 x bfloat> %2 diff --git a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll index 1dcce5336895f0..257524e0d4db5c 100644 --- a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll +++ b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll @@ -2519,7 +2519,7 @@ define <4 x bfloat> @test_fmaximum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) { ; ; AVX10_2-LABEL: test_fmaximum_v4bf16: ; AVX10_2: # %bb.0: -; AVX10_2-NEXT: vminmaxnepbf16 $1, %xmm1, %xmm0, %xmm0 +; AVX10_2-NEXT: vminmaxbf16 $1, %xmm1, %xmm0, %xmm0 ; AVX10_2-NEXT: retq ; ; X86-LABEL: test_fmaximum_v4bf16: diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll index 2e9e8e62b35693..bfff6ef41dbe00 100644 --- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll +++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll @@ -2647,7 +2647,7 @@ define <4 x bfloat> @test_fmaximumnum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) n ; ; AVX10_2-LABEL: test_fmaximumnum_v4bf16: ; AVX10_2: # %bb.0: -; AVX10_2-NEXT: vminmaxnepbf16 $17, %xmm1, %xmm0, %xmm0 +; AVX10_2-NEXT: vminmaxbf16 $17, %xmm1, %xmm0, %xmm0 ; AVX10_2-NEXT: retq ; ; X86-LABEL: test_fmaximumnum_v4bf16: diff --git a/llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt b/llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt index 532128c19768bf..96f9bdccbde192 100644 --- a/llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt +++ b/llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt @@ -1,112 +1,112 @@ # RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT # RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL -# ATT: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 -# INTEL: vminmaxnepbf16 xmm2, xmm3, xmm4, 123 +# ATT: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 +# INTEL: vminmaxbf16 xmm2, xmm3, xmm4, 123 0x62,0xf3,0x67,0x08,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} -# INTEL: vminmaxnepbf16 xmm2 {k7}, xmm3, xmm4, 123 +# ATT: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} +# INTEL: vminmaxbf16 xmm2 {k7}, xmm3, xmm4, 123 0x62,0xf3,0x67,0x0f,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 +# ATT: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} +# INTEL: vminmaxbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 0x62,0xf3,0x67,0x8f,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 -# INTEL: vminmaxnepbf16 zmm2, zmm3, zmm4, 123 +# ATT: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 +# INTEL: vminmaxbf16 zmm2, zmm3, zmm4, 123 0x62,0xf3,0x67,0x48,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} -# INTEL: vminmaxnepbf16 zmm2 {k7}, zmm3, zmm4, 123 +# ATT: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} +# INTEL: vminmaxbf16 zmm2 {k7}, zmm3, zmm4, 123 0x62,0xf3,0x67,0x4f,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 +# ATT: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} +# INTEL: vminmaxbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 0x62,0xf3,0x67,0xcf,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 -# INTEL: vminmaxnepbf16 ymm2, ymm3, ymm4, 123 +# ATT: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 +# INTEL: vminmaxbf16 ymm2, ymm3, ymm4, 123 0x62,0xf3,0x67,0x28,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} -# INTEL: vminmaxnepbf16 ymm2 {k7}, ymm3, ymm4, 123 +# ATT: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} +# INTEL: vminmaxbf16 ymm2 {k7}, ymm3, ymm4, 123 0x62,0xf3,0x67,0x2f,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 +# ATT: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} +# INTEL: vminmaxbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 0x62,0xf3,0x67,0xaf,0x52,0xd4,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 -# INTEL: vminmaxnepbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 +# INTEL: vminmaxbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 0x62,0xf3,0x67,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} -# INTEL: vminmaxnepbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} +# INTEL: vminmaxbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 0x62,0xf3,0x67,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%eax){1to16}, %ymm3, %ymm2 -# INTEL: vminmaxnepbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 +# ATT: vminmaxbf16 $123, (%eax){1to16}, %ymm3, %ymm2 +# INTEL: vminmaxbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 0x62,0xf3,0x67,0x38,0x52,0x10,0x7b -# ATT: vminmaxnepbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 -# INTEL: vminmaxnepbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 +# ATT: vminmaxbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 +# INTEL: vminmaxbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 0x62,0xf3,0x67,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 +# ATT: vminmaxbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} +# INTEL: vminmaxbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 0x62,0xf3,0x67,0xaf,0x52,0x51,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 +# ATT: vminmaxbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} +# INTEL: vminmaxbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 0x62,0xf3,0x67,0xbf,0x52,0x52,0x80,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 -# INTEL: vminmaxnepbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 +# INTEL: vminmaxbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 0x62,0xf3,0x67,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} -# INTEL: vminmaxnepbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} +# INTEL: vminmaxbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 0x62,0xf3,0x67,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%eax){1to8}, %xmm3, %xmm2 -# INTEL: vminmaxnepbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 +# ATT: vminmaxbf16 $123, (%eax){1to8}, %xmm3, %xmm2 +# INTEL: vminmaxbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 0x62,0xf3,0x67,0x18,0x52,0x10,0x7b -# ATT: vminmaxnepbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 -# INTEL: vminmaxnepbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 +# ATT: vminmaxbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 +# INTEL: vminmaxbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 0x62,0xf3,0x67,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 +# ATT: vminmaxbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} +# INTEL: vminmaxbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 0x62,0xf3,0x67,0x8f,0x52,0x51,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 +# ATT: vminmaxbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} +# INTEL: vminmaxbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 0x62,0xf3,0x67,0x9f,0x52,0x52,0x80,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 -# INTEL: vminmaxnepbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 +# INTEL: vminmaxbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 0x62,0xf3,0x67,0x48,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} -# INTEL: vminmaxnepbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} +# INTEL: vminmaxbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 0x62,0xf3,0x67,0x4f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%eax){1to32}, %zmm3, %zmm2 -# INTEL: vminmaxnepbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 +# ATT: vminmaxbf16 $123, (%eax){1to32}, %zmm3, %zmm2 +# INTEL: vminmaxbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 0x62,0xf3,0x67,0x58,0x52,0x10,0x7b -# ATT: vminmaxnepbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 -# INTEL: vminmaxnepbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 +# ATT: vminmaxbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 +# INTEL: vminmaxbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 0x62,0xf3,0x67,0x48,0x52,0x14,0x6d,0x00,0xf8,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 +# ATT: vminmaxbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} +# INTEL: vminmaxbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 0x62,0xf3,0x67,0xcf,0x52,0x51,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 +# ATT: vminmaxbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} +# INTEL: vminmaxbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 0x62,0xf3,0x67,0xdf,0x52,0x52,0x80,0x7b # ATT: vminmaxpd $123, %xmm4, %xmm3, %xmm2 diff --git a/llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt b/llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt index fdb2f6877806eb..af80fb1a3f48c3 100644 --- a/llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt +++ b/llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt @@ -1,112 +1,112 @@ # RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT # RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL -# ATT: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 -# INTEL: vminmaxnepbf16 xmm22, xmm23, xmm24, 123 +# ATT: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 +# INTEL: vminmaxbf16 xmm22, xmm23, xmm24, 123 0x62,0x83,0x47,0x00,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} -# INTEL: vminmaxnepbf16 xmm22 {k7}, xmm23, xmm24, 123 +# ATT: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} +# INTEL: vminmaxbf16 xmm22 {k7}, xmm23, xmm24, 123 0x62,0x83,0x47,0x07,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 +# ATT: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} +# INTEL: vminmaxbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 0x62,0x83,0x47,0x87,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 -# INTEL: vminmaxnepbf16 zmm22, zmm23, zmm24, 123 +# ATT: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 +# INTEL: vminmaxbf16 zmm22, zmm23, zmm24, 123 0x62,0x83,0x47,0x40,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} -# INTEL: vminmaxnepbf16 zmm22 {k7}, zmm23, zmm24, 123 +# ATT: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} +# INTEL: vminmaxbf16 zmm22 {k7}, zmm23, zmm24, 123 0x62,0x83,0x47,0x47,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 +# ATT: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} +# INTEL: vminmaxbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 0x62,0x83,0x47,0xc7,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 -# INTEL: vminmaxnepbf16 ymm22, ymm23, ymm24, 123 +# ATT: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 +# INTEL: vminmaxbf16 ymm22, ymm23, ymm24, 123 0x62,0x83,0x47,0x20,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} -# INTEL: vminmaxnepbf16 ymm22 {k7}, ymm23, ymm24, 123 +# ATT: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} +# INTEL: vminmaxbf16 ymm22 {k7}, ymm23, ymm24, 123 0x62,0x83,0x47,0x27,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 +# ATT: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} +# INTEL: vminmaxbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 0x62,0x83,0x47,0xa7,0x52,0xf0,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 -# INTEL: vminmaxnepbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 +# INTEL: vminmaxbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 0x62,0xa3,0x47,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} -# INTEL: vminmaxnepbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} +# INTEL: vminmaxbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 0x62,0xc3,0x47,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%rip){1to16}, %ymm23, %ymm22 -# INTEL: vminmaxnepbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 +# ATT: vminmaxbf16 $123, (%rip){1to16}, %ymm23, %ymm22 +# INTEL: vminmaxbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 0x62,0xe3,0x47,0x30,0x52,0x35,0x00,0x00,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 -# INTEL: vminmaxnepbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 +# ATT: vminmaxbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 +# INTEL: vminmaxbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 0x62,0xe3,0x47,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 +# ATT: vminmaxbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} +# INTEL: vminmaxbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 0x62,0xe3,0x47,0xa7,0x52,0x71,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} -# INTEL: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 +# ATT: vminmaxbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} +# INTEL: vminmaxbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 0x62,0xe3,0x47,0xb7,0x52,0x72,0x80,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 -# INTEL: vminmaxnepbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 +# INTEL: vminmaxbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 0x62,0xa3,0x47,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} -# INTEL: vminmaxnepbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} +# INTEL: vminmaxbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 0x62,0xc3,0x47,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%rip){1to8}, %xmm23, %xmm22 -# INTEL: vminmaxnepbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 +# ATT: vminmaxbf16 $123, (%rip){1to8}, %xmm23, %xmm22 +# INTEL: vminmaxbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 0x62,0xe3,0x47,0x10,0x52,0x35,0x00,0x00,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 -# INTEL: vminmaxnepbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 +# ATT: vminmaxbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 +# INTEL: vminmaxbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 0x62,0xe3,0x47,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 +# ATT: vminmaxbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} +# INTEL: vminmaxbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 0x62,0xe3,0x47,0x87,0x52,0x71,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 +# ATT: vminmaxbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} +# INTEL: vminmaxbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 0x62,0xe3,0x47,0x97,0x52,0x72,0x80,0x7b -# ATT: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 -# INTEL: vminmaxnepbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 +# ATT: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 +# INTEL: vminmaxbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 0x62,0xa3,0x47,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b -# ATT: vminmaxnepbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} -# INTEL: vminmaxnepbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 +# ATT: vminmaxbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} +# INTEL: vminmaxbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 0x62,0xc3,0x47,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, (%rip){1to32}, %zmm23, %zmm22 -# INTEL: vminmaxnepbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 +# ATT: vminmaxbf16 $123, (%rip){1to32}, %zmm23, %zmm22 +# INTEL: vminmaxbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 0x62,0xe3,0x47,0x50,0x52,0x35,0x00,0x00,0x00,0x00,0x7b -# ATT: vminmaxnepbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 -# INTEL: vminmaxnepbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 +# ATT: vminmaxbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 +# INTEL: vminmaxbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 0x62,0xe3,0x47,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff,0x7b -# ATT: vminmaxnepbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 +# ATT: vminmaxbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} +# INTEL: vminmaxbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 0x62,0xe3,0x47,0xc7,0x52,0x71,0x7f,0x7b -# ATT: vminmaxnepbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} -# INTEL: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 +# ATT: vminmaxbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} +# INTEL: vminmaxbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 0x62,0xe3,0x47,0xd7,0x52,0x72,0x80,0x7b # ATT: vminmaxpd $123, %xmm24, %xmm23, %xmm22 diff --git a/llvm/test/MC/X86/avx10.2minmax-32-att.s b/llvm/test/MC/X86/avx10.2minmax-32-att.s index f6900899af28ec..5e3b687543c42b 100644 --- a/llvm/test/MC/X86/avx10.2minmax-32-att.s +++ b/llvm/test/MC/X86/avx10.2minmax-32-att.s @@ -1,112 +1,112 @@ // RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s -// CHECK: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 +// CHECK: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 + vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 -// CHECK: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} +// CHECK: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x0f,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} + vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} -// CHECK: vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0x8f,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} + vminmaxbf16 $123, %xmm4, %xmm3, %xmm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 +// CHECK: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 + vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 -// CHECK: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} +// CHECK: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x4f,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} + vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} -// CHECK: vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xcf,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} + vminmaxbf16 $123, %zmm4, %zmm3, %zmm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 +// CHECK: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 + vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 -// CHECK: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} +// CHECK: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x2f,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} + vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} -// CHECK: vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xaf,0x52,0xd4,0x7b] - vminmaxnepbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} + vminmaxbf16 $123, %ymm4, %ymm3, %ymm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 +// CHECK: vminmaxbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 + vminmaxbf16 $123, 268435456(%esp,%esi,8), %ymm3, %ymm2 -// CHECK: vminmaxnepbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} +// CHECK: vminmaxbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} + vminmaxbf16 $123, 291(%edi,%eax,4), %ymm3, %ymm2 {%k7} -// CHECK: vminmaxnepbf16 $123, (%eax){1to16}, %ymm3, %ymm2 +// CHECK: vminmaxbf16 $123, (%eax){1to16}, %ymm3, %ymm2 // CHECK: encoding: [0x62,0xf3,0x67,0x38,0x52,0x10,0x7b] - vminmaxnepbf16 $123, (%eax){1to16}, %ymm3, %ymm2 + vminmaxbf16 $123, (%eax){1to16}, %ymm3, %ymm2 -// CHECK: vminmaxnepbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 +// CHECK: vminmaxbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 + vminmaxbf16 $123, -1024(,%ebp,2), %ymm3, %ymm2 -// CHECK: vminmaxnepbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xaf,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} + vminmaxbf16 $123, 4064(%ecx), %ymm3, %ymm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xbf,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} + vminmaxbf16 $123, -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 +// CHECK: vminmaxbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 + vminmaxbf16 $123, 268435456(%esp,%esi,8), %xmm3, %xmm2 -// CHECK: vminmaxnepbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} +// CHECK: vminmaxbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} + vminmaxbf16 $123, 291(%edi,%eax,4), %xmm3, %xmm2 {%k7} -// CHECK: vminmaxnepbf16 $123, (%eax){1to8}, %xmm3, %xmm2 +// CHECK: vminmaxbf16 $123, (%eax){1to8}, %xmm3, %xmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x18,0x52,0x10,0x7b] - vminmaxnepbf16 $123, (%eax){1to8}, %xmm3, %xmm2 + vminmaxbf16 $123, (%eax){1to8}, %xmm3, %xmm2 -// CHECK: vminmaxnepbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 +// CHECK: vminmaxbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 + vminmaxbf16 $123, -512(,%ebp,2), %xmm3, %xmm2 -// CHECK: vminmaxnepbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0x8f,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} + vminmaxbf16 $123, 2032(%ecx), %xmm3, %xmm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0x9f,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} + vminmaxbf16 $123, -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 +// CHECK: vminmaxbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 + vminmaxbf16 $123, 268435456(%esp,%esi,8), %zmm3, %zmm2 -// CHECK: vminmaxnepbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} +// CHECK: vminmaxbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} // CHECK: encoding: [0x62,0xf3,0x67,0x4f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} + vminmaxbf16 $123, 291(%edi,%eax,4), %zmm3, %zmm2 {%k7} -// CHECK: vminmaxnepbf16 $123, (%eax){1to32}, %zmm3, %zmm2 +// CHECK: vminmaxbf16 $123, (%eax){1to32}, %zmm3, %zmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x58,0x52,0x10,0x7b] - vminmaxnepbf16 $123, (%eax){1to32}, %zmm3, %zmm2 + vminmaxbf16 $123, (%eax){1to32}, %zmm3, %zmm2 -// CHECK: vminmaxnepbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 +// CHECK: vminmaxbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0x14,0x6d,0x00,0xf8,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 + vminmaxbf16 $123, -2048(,%ebp,2), %zmm3, %zmm2 -// CHECK: vminmaxnepbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xcf,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} + vminmaxbf16 $123, 8128(%ecx), %zmm3, %zmm2 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} // CHECK: encoding: [0x62,0xf3,0x67,0xdf,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} + vminmaxbf16 $123, -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z} // CHECK: vminmaxpd $123, %xmm4, %xmm3, %xmm2 // CHECK: encoding: [0x62,0xf3,0xe5,0x08,0x52,0xd4,0x7b] diff --git a/llvm/test/MC/X86/avx10.2minmax-32-intel.s b/llvm/test/MC/X86/avx10.2minmax-32-intel.s index 1d668ee15a4099..c237b09e159547 100644 --- a/llvm/test/MC/X86/avx10.2minmax-32-intel.s +++ b/llvm/test/MC/X86/avx10.2minmax-32-intel.s @@ -1,112 +1,112 @@ // RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s -// CHECK: vminmaxnepbf16 xmm2, xmm3, xmm4, 123 +// CHECK: vminmaxbf16 xmm2, xmm3, xmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0xd4,0x7b] - vminmaxnepbf16 xmm2, xmm3, xmm4, 123 + vminmaxbf16 xmm2, xmm3, xmm4, 123 -// CHECK: vminmaxnepbf16 xmm2 {k7}, xmm3, xmm4, 123 +// CHECK: vminmaxbf16 xmm2 {k7}, xmm3, xmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x0f,0x52,0xd4,0x7b] - vminmaxnepbf16 xmm2 {k7}, xmm3, xmm4, 123 + vminmaxbf16 xmm2 {k7}, xmm3, xmm4, 123 -// CHECK: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 +// CHECK: vminmaxbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x8f,0x52,0xd4,0x7b] - vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 + vminmaxbf16 xmm2 {k7} {z}, xmm3, xmm4, 123 -// CHECK: vminmaxnepbf16 zmm2, zmm3, zmm4, 123 +// CHECK: vminmaxbf16 zmm2, zmm3, zmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0xd4,0x7b] - vminmaxnepbf16 zmm2, zmm3, zmm4, 123 + vminmaxbf16 zmm2, zmm3, zmm4, 123 -// CHECK: vminmaxnepbf16 zmm2 {k7}, zmm3, zmm4, 123 +// CHECK: vminmaxbf16 zmm2 {k7}, zmm3, zmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x4f,0x52,0xd4,0x7b] - vminmaxnepbf16 zmm2 {k7}, zmm3, zmm4, 123 + vminmaxbf16 zmm2 {k7}, zmm3, zmm4, 123 -// CHECK: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 +// CHECK: vminmaxbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0xcf,0x52,0xd4,0x7b] - vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 + vminmaxbf16 zmm2 {k7} {z}, zmm3, zmm4, 123 -// CHECK: vminmaxnepbf16 ymm2, ymm3, ymm4, 123 +// CHECK: vminmaxbf16 ymm2, ymm3, ymm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0xd4,0x7b] - vminmaxnepbf16 ymm2, ymm3, ymm4, 123 + vminmaxbf16 ymm2, ymm3, ymm4, 123 -// CHECK: vminmaxnepbf16 ymm2 {k7}, ymm3, ymm4, 123 +// CHECK: vminmaxbf16 ymm2 {k7}, ymm3, ymm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x2f,0x52,0xd4,0x7b] - vminmaxnepbf16 ymm2 {k7}, ymm3, ymm4, 123 + vminmaxbf16 ymm2 {k7}, ymm3, ymm4, 123 -// CHECK: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 +// CHECK: vminmaxbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 // CHECK: encoding: [0x62,0xf3,0x67,0xaf,0x52,0xd4,0x7b] - vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 + vminmaxbf16 ymm2 {k7} {z}, ymm3, ymm4, 123 -// CHECK: vminmaxnepbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 +// CHECK: vminmaxbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 + vminmaxbf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456], 123 -// CHECK: vminmaxnepbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 +// CHECK: vminmaxbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 + vminmaxbf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291], 123 -// CHECK: vminmaxnepbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 +// CHECK: vminmaxbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x38,0x52,0x10,0x7b] - vminmaxnepbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 + vminmaxbf16 ymm2, ymm3, word ptr [eax]{1to16}, 123 -// CHECK: vminmaxnepbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 +// CHECK: vminmaxbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff,0x7b] - vminmaxnepbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 + vminmaxbf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024], 123 -// CHECK: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 +// CHECK: vminmaxbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 // CHECK: encoding: [0x62,0xf3,0x67,0xaf,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 + vminmaxbf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064], 123 -// CHECK: vminmaxnepbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 +// CHECK: vminmaxbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0xbf,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 + vminmaxbf16 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}, 123 -// CHECK: vminmaxnepbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 +// CHECK: vminmaxbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 + vminmaxbf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456], 123 -// CHECK: vminmaxnepbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 +// CHECK: vminmaxbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 + vminmaxbf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291], 123 -// CHECK: vminmaxnepbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 +// CHECK: vminmaxbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x18,0x52,0x10,0x7b] - vminmaxnepbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 + vminmaxbf16 xmm2, xmm3, word ptr [eax]{1to8}, 123 -// CHECK: vminmaxnepbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 +// CHECK: vminmaxbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff,0x7b] - vminmaxnepbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 + vminmaxbf16 xmm2, xmm3, xmmword ptr [2*ebp - 512], 123 -// CHECK: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 +// CHECK: vminmaxbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x8f,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 + vminmaxbf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032], 123 -// CHECK: vminmaxnepbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 +// CHECK: vminmaxbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x9f,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 + vminmaxbf16 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}, 123 -// CHECK: vminmaxnepbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 +// CHECK: vminmaxbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0x94,0xf4,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 + vminmaxbf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456], 123 -// CHECK: vminmaxnepbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 +// CHECK: vminmaxbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x4f,0x52,0x94,0x87,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 + vminmaxbf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291], 123 -// CHECK: vminmaxnepbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 +// CHECK: vminmaxbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0x58,0x52,0x10,0x7b] - vminmaxnepbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 + vminmaxbf16 zmm2, zmm3, word ptr [eax]{1to32}, 123 -// CHECK: vminmaxnepbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 +// CHECK: vminmaxbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 // CHECK: encoding: [0x62,0xf3,0x67,0x48,0x52,0x14,0x6d,0x00,0xf8,0xff,0xff,0x7b] - vminmaxnepbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 + vminmaxbf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048], 123 -// CHECK: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 +// CHECK: vminmaxbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 // CHECK: encoding: [0x62,0xf3,0x67,0xcf,0x52,0x51,0x7f,0x7b] - vminmaxnepbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 + vminmaxbf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128], 123 -// CHECK: vminmaxnepbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 +// CHECK: vminmaxbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 // CHECK: encoding: [0x62,0xf3,0x67,0xdf,0x52,0x52,0x80,0x7b] - vminmaxnepbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 + vminmaxbf16 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}, 123 // CHECK: vminmaxpd xmm2, xmm3, xmm4, 123 // CHECK: encoding: [0x62,0xf3,0xe5,0x08,0x52,0xd4,0x7b] diff --git a/llvm/test/MC/X86/avx10.2minmax-64-att.s b/llvm/test/MC/X86/avx10.2minmax-64-att.s index f58b4a51b995f7..ad237d1fb25962 100644 --- a/llvm/test/MC/X86/avx10.2minmax-64-att.s +++ b/llvm/test/MC/X86/avx10.2minmax-64-att.s @@ -1,112 +1,112 @@ // RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s -// CHECK: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 +// CHECK: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 // CHECK: encoding: [0x62,0x83,0x47,0x00,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 + vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 -// CHECK: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} +// CHECK: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} // CHECK: encoding: [0x62,0x83,0x47,0x07,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} + vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} -// CHECK: vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} // CHECK: encoding: [0x62,0x83,0x47,0x87,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} + vminmaxbf16 $123, %xmm24, %xmm23, %xmm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 +// CHECK: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 // CHECK: encoding: [0x62,0x83,0x47,0x40,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 + vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 -// CHECK: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} +// CHECK: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} // CHECK: encoding: [0x62,0x83,0x47,0x47,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} + vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} -// CHECK: vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} // CHECK: encoding: [0x62,0x83,0x47,0xc7,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} + vminmaxbf16 $123, %zmm24, %zmm23, %zmm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 +// CHECK: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 // CHECK: encoding: [0x62,0x83,0x47,0x20,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 + vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 -// CHECK: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} +// CHECK: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} // CHECK: encoding: [0x62,0x83,0x47,0x27,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} + vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} -// CHECK: vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} // CHECK: encoding: [0x62,0x83,0x47,0xa7,0x52,0xf0,0x7b] - vminmaxnepbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} + vminmaxbf16 $123, %ymm24, %ymm23, %ymm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 +// CHECK: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 // CHECK: encoding: [0x62,0xa3,0x47,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 + vminmaxbf16 $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22 -// CHECK: vminmaxnepbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} +// CHECK: vminmaxbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} // CHECK: encoding: [0x62,0xc3,0x47,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} + vminmaxbf16 $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7} -// CHECK: vminmaxnepbf16 $123, (%rip){1to16}, %ymm23, %ymm22 +// CHECK: vminmaxbf16 $123, (%rip){1to16}, %ymm23, %ymm22 // CHECK: encoding: [0x62,0xe3,0x47,0x30,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 $123, (%rip){1to16}, %ymm23, %ymm22 + vminmaxbf16 $123, (%rip){1to16}, %ymm23, %ymm22 -// CHECK: vminmaxnepbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 +// CHECK: vminmaxbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 // CHECK: encoding: [0x62,0xe3,0x47,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 + vminmaxbf16 $123, -1024(,%rbp,2), %ymm23, %ymm22 -// CHECK: vminmaxnepbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0xa7,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} + vminmaxbf16 $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0xb7,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} + vminmaxbf16 $123, -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 +// CHECK: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 // CHECK: encoding: [0x62,0xa3,0x47,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 + vminmaxbf16 $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22 -// CHECK: vminmaxnepbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} +// CHECK: vminmaxbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} // CHECK: encoding: [0x62,0xc3,0x47,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} + vminmaxbf16 $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7} -// CHECK: vminmaxnepbf16 $123, (%rip){1to8}, %xmm23, %xmm22 +// CHECK: vminmaxbf16 $123, (%rip){1to8}, %xmm23, %xmm22 // CHECK: encoding: [0x62,0xe3,0x47,0x10,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 $123, (%rip){1to8}, %xmm23, %xmm22 + vminmaxbf16 $123, (%rip){1to8}, %xmm23, %xmm22 -// CHECK: vminmaxnepbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 +// CHECK: vminmaxbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 // CHECK: encoding: [0x62,0xe3,0x47,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 + vminmaxbf16 $123, -512(,%rbp,2), %xmm23, %xmm22 -// CHECK: vminmaxnepbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0x87,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} + vminmaxbf16 $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0x97,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} + vminmaxbf16 $123, -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 +// CHECK: vminmaxbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 // CHECK: encoding: [0x62,0xa3,0x47,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 + vminmaxbf16 $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22 -// CHECK: vminmaxnepbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} +// CHECK: vminmaxbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} // CHECK: encoding: [0x62,0xc3,0x47,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} + vminmaxbf16 $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7} -// CHECK: vminmaxnepbf16 $123, (%rip){1to32}, %zmm23, %zmm22 +// CHECK: vminmaxbf16 $123, (%rip){1to32}, %zmm23, %zmm22 // CHECK: encoding: [0x62,0xe3,0x47,0x50,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 $123, (%rip){1to32}, %zmm23, %zmm22 + vminmaxbf16 $123, (%rip){1to32}, %zmm23, %zmm22 -// CHECK: vminmaxnepbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 +// CHECK: vminmaxbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 // CHECK: encoding: [0x62,0xe3,0x47,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff,0x7b] - vminmaxnepbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 + vminmaxbf16 $123, -2048(,%rbp,2), %zmm23, %zmm22 -// CHECK: vminmaxnepbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0xc7,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} + vminmaxbf16 $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z} -// CHECK: vminmaxnepbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} +// CHECK: vminmaxbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} // CHECK: encoding: [0x62,0xe3,0x47,0xd7,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} + vminmaxbf16 $123, -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z} // CHECK: vminmaxpd $123, %xmm24, %xmm23, %xmm22 // CHECK: encoding: [0x62,0x83,0xc5,0x00,0x52,0xf0,0x7b] diff --git a/llvm/test/MC/X86/avx10.2minmax-64-intel.s b/llvm/test/MC/X86/avx10.2minmax-64-intel.s index 8630d7f96165c5..81c59332fac848 100644 --- a/llvm/test/MC/X86/avx10.2minmax-64-intel.s +++ b/llvm/test/MC/X86/avx10.2minmax-64-intel.s @@ -1,112 +1,112 @@ // RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s -// CHECK: vminmaxnepbf16 xmm22, xmm23, xmm24, 123 +// CHECK: vminmaxbf16 xmm22, xmm23, xmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x00,0x52,0xf0,0x7b] - vminmaxnepbf16 xmm22, xmm23, xmm24, 123 + vminmaxbf16 xmm22, xmm23, xmm24, 123 -// CHECK: vminmaxnepbf16 xmm22 {k7}, xmm23, xmm24, 123 +// CHECK: vminmaxbf16 xmm22 {k7}, xmm23, xmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x07,0x52,0xf0,0x7b] - vminmaxnepbf16 xmm22 {k7}, xmm23, xmm24, 123 + vminmaxbf16 xmm22 {k7}, xmm23, xmm24, 123 -// CHECK: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 +// CHECK: vminmaxbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x87,0x52,0xf0,0x7b] - vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 + vminmaxbf16 xmm22 {k7} {z}, xmm23, xmm24, 123 -// CHECK: vminmaxnepbf16 zmm22, zmm23, zmm24, 123 +// CHECK: vminmaxbf16 zmm22, zmm23, zmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x40,0x52,0xf0,0x7b] - vminmaxnepbf16 zmm22, zmm23, zmm24, 123 + vminmaxbf16 zmm22, zmm23, zmm24, 123 -// CHECK: vminmaxnepbf16 zmm22 {k7}, zmm23, zmm24, 123 +// CHECK: vminmaxbf16 zmm22 {k7}, zmm23, zmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x47,0x52,0xf0,0x7b] - vminmaxnepbf16 zmm22 {k7}, zmm23, zmm24, 123 + vminmaxbf16 zmm22 {k7}, zmm23, zmm24, 123 -// CHECK: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 +// CHECK: vminmaxbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0xc7,0x52,0xf0,0x7b] - vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 + vminmaxbf16 zmm22 {k7} {z}, zmm23, zmm24, 123 -// CHECK: vminmaxnepbf16 ymm22, ymm23, ymm24, 123 +// CHECK: vminmaxbf16 ymm22, ymm23, ymm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x20,0x52,0xf0,0x7b] - vminmaxnepbf16 ymm22, ymm23, ymm24, 123 + vminmaxbf16 ymm22, ymm23, ymm24, 123 -// CHECK: vminmaxnepbf16 ymm22 {k7}, ymm23, ymm24, 123 +// CHECK: vminmaxbf16 ymm22 {k7}, ymm23, ymm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0x27,0x52,0xf0,0x7b] - vminmaxnepbf16 ymm22 {k7}, ymm23, ymm24, 123 + vminmaxbf16 ymm22 {k7}, ymm23, ymm24, 123 -// CHECK: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 +// CHECK: vminmaxbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 // CHECK: encoding: [0x62,0x83,0x47,0xa7,0x52,0xf0,0x7b] - vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 + vminmaxbf16 ymm22 {k7} {z}, ymm23, ymm24, 123 -// CHECK: vminmaxnepbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 +// CHECK: vminmaxbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 // CHECK: encoding: [0x62,0xa3,0x47,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 + vminmaxbf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123 -// CHECK: vminmaxnepbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 +// CHECK: vminmaxbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 // CHECK: encoding: [0x62,0xc3,0x47,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 + vminmaxbf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123 -// CHECK: vminmaxnepbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 +// CHECK: vminmaxbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0x30,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 + vminmaxbf16 ymm22, ymm23, word ptr [rip]{1to16}, 123 -// CHECK: vminmaxnepbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 +// CHECK: vminmaxbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 // CHECK: encoding: [0x62,0xe3,0x47,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff,0x7b] - vminmaxnepbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 + vminmaxbf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123 -// CHECK: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 +// CHECK: vminmaxbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 // CHECK: encoding: [0x62,0xe3,0x47,0xa7,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 + vminmaxbf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123 -// CHECK: vminmaxnepbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 +// CHECK: vminmaxbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0xb7,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 + vminmaxbf16 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}, 123 -// CHECK: vminmaxnepbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 +// CHECK: vminmaxbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 // CHECK: encoding: [0x62,0xa3,0x47,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 + vminmaxbf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123 -// CHECK: vminmaxnepbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 +// CHECK: vminmaxbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 // CHECK: encoding: [0x62,0xc3,0x47,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 + vminmaxbf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123 -// CHECK: vminmaxnepbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 +// CHECK: vminmaxbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0x10,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 + vminmaxbf16 xmm22, xmm23, word ptr [rip]{1to8}, 123 -// CHECK: vminmaxnepbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 +// CHECK: vminmaxbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 // CHECK: encoding: [0x62,0xe3,0x47,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff,0x7b] - vminmaxnepbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 + vminmaxbf16 xmm22, xmm23, xmmword ptr [2*rbp - 512], 123 -// CHECK: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 +// CHECK: vminmaxbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 // CHECK: encoding: [0x62,0xe3,0x47,0x87,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 + vminmaxbf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123 -// CHECK: vminmaxnepbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 +// CHECK: vminmaxbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0x97,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 + vminmaxbf16 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}, 123 -// CHECK: vminmaxnepbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 +// CHECK: vminmaxbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 // CHECK: encoding: [0x62,0xa3,0x47,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b] - vminmaxnepbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 + vminmaxbf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123 -// CHECK: vminmaxnepbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 +// CHECK: vminmaxbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 // CHECK: encoding: [0x62,0xc3,0x47,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b] - vminmaxnepbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 + vminmaxbf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123 -// CHECK: vminmaxnepbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 +// CHECK: vminmaxbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0x50,0x52,0x35,0x00,0x00,0x00,0x00,0x7b] - vminmaxnepbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 + vminmaxbf16 zmm22, zmm23, word ptr [rip]{1to32}, 123 -// CHECK: vminmaxnepbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 +// CHECK: vminmaxbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 // CHECK: encoding: [0x62,0xe3,0x47,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff,0x7b] - vminmaxnepbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 + vminmaxbf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123 -// CHECK: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 +// CHECK: vminmaxbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 // CHECK: encoding: [0x62,0xe3,0x47,0xc7,0x52,0x71,0x7f,0x7b] - vminmaxnepbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 + vminmaxbf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123 -// CHECK: vminmaxnepbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 +// CHECK: vminmaxbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 // CHECK: encoding: [0x62,0xe3,0x47,0xd7,0x52,0x72,0x80,0x7b] - vminmaxnepbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 + vminmaxbf16 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}, 123 // CHECK: vminmaxpd xmm22, xmm23, xmm24, 123 // CHECK: encoding: [0x62,0x83,0xc5,0x00,0x52,0xf0,0x7b] diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc index 954c05bdb20767..cc49ed9b94d559 100644 --- a/llvm/test/TableGen/x86-fold-tables.inc +++ b/llvm/test/TableGen/x86-fold-tables.inc @@ -3073,9 +3073,9 @@ static const X86FoldTableEntry Table2[] = { {X86::VMINCSHZrr, X86::VMINCSHZrm, 0}, {X86::VMINCSSZrr, X86::VMINCSSZrm, 0}, {X86::VMINCSSrr, X86::VMINCSSrm, 0}, - {X86::VMINMAXNEPBF16Z128rri, X86::VMINMAXNEPBF16Z128rmi, 0}, - {X86::VMINMAXNEPBF16Z256rri, X86::VMINMAXNEPBF16Z256rmi, 0}, - {X86::VMINMAXNEPBF16Zrri, X86::VMINMAXNEPBF16Zrmi, 0}, + {X86::VMINMAXBF16Z128rri, X86::VMINMAXBF16Z128rmi, 0}, + {X86::VMINMAXBF16Z256rri, X86::VMINMAXBF16Z256rmi, 0}, + {X86::VMINMAXBF16Zrri, X86::VMINMAXBF16Zrmi, 0}, {X86::VMINMAXPDZ128rri, X86::VMINMAXPDZ128rmi, 0}, {X86::VMINMAXPDZ256rri, X86::VMINMAXPDZ256rmi, 0}, {X86::VMINMAXPDZrri, X86::VMINMAXPDZrmi, 0}, @@ -5122,9 +5122,9 @@ static const X86FoldTableEntry Table3[] = { {X86::VMINCPSZ128rrkz, X86::VMINCPSZ128rmkz, 0}, {X86::VMINCPSZ256rrkz, X86::VMINCPSZ256rmkz, 0}, {X86::VMINCPSZrrkz, X86::VMINCPSZrmkz, 0}, - {X86::VMINMAXNEPBF16Z128rrikz, X86::VMINMAXNEPBF16Z128rmikz, 0}, - {X86::VMINMAXNEPBF16Z256rrikz, X86::VMINMAXNEPBF16Z256rmikz, 0}, - {X86::VMINMAXNEPBF16Zrrikz, X86::VMINMAXNEPBF16Zrmikz, 0}, + {X86::VMINMAXBF16Z128rrikz, X86::VMINMAXBF16Z128rmikz, 0}, + {X86::VMINMAXBF16Z256rrikz, X86::VMINMAXBF16Z256rmikz, 0}, + {X86::VMINMAXBF16Zrrikz, X86::VMINMAXBF16Zrmikz, 0}, {X86::VMINMAXPDZ128rrikz, X86::VMINMAXPDZ128rmikz, 0}, {X86::VMINMAXPDZ256rrikz, X86::VMINMAXPDZ256rmikz, 0}, {X86::VMINMAXPDZrrikz, X86::VMINMAXPDZrmikz, 0}, @@ -6744,9 +6744,9 @@ static const X86FoldTableEntry Table4[] = { {X86::VMINCPSZ128rrk, X86::VMINCPSZ128rmk, 0}, {X86::VMINCPSZ256rrk, X86::VMINCPSZ256rmk, 0}, {X86::VMINCPSZrrk, X86::VMINCPSZrmk, 0}, - {X86::VMINMAXNEPBF16Z128rrik, X86::VMINMAXNEPBF16Z128rmik, 0}, - {X86::VMINMAXNEPBF16Z256rrik, X86::VMINMAXNEPBF16Z256rmik, 0}, - {X86::VMINMAXNEPBF16Zrrik, X86::VMINMAXNEPBF16Zrmik, 0}, + {X86::VMINMAXBF16Z128rrik, X86::VMINMAXBF16Z128rmik, 0}, + {X86::VMINMAXBF16Z256rrik, X86::VMINMAXBF16Z256rmik, 0}, + {X86::VMINMAXBF16Zrrik, X86::VMINMAXBF16Zrmik, 0}, {X86::VMINMAXPDZ128rrik, X86::VMINMAXPDZ128rmik, 0}, {X86::VMINMAXPDZ256rrik, X86::VMINMAXPDZ256rmik, 0}, {X86::VMINMAXPDZrrik, X86::VMINMAXPDZrmik, 0}, @@ -8203,9 +8203,9 @@ static const X86FoldTableEntry BroadcastTable2[] = { {X86::VMINCPSZ128rr, X86::VMINCPSZ128rmb, TB_BCAST_SS}, {X86::VMINCPSZ256rr, X86::VMINCPSZ256rmb, TB_BCAST_SS}, {X86::VMINCPSZrr, X86::VMINCPSZrmb, TB_BCAST_SS}, - {X86::VMINMAXNEPBF16Z128rri, X86::VMINMAXNEPBF16Z128rmbi, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Z256rri, X86::VMINMAXNEPBF16Z256rmbi, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Zrri, X86::VMINMAXNEPBF16Zrmbi, TB_BCAST_SH}, + {X86::VMINMAXBF16Z128rri, X86::VMINMAXBF16Z128rmbi, TB_BCAST_SH}, + {X86::VMINMAXBF16Z256rri, X86::VMINMAXBF16Z256rmbi, TB_BCAST_SH}, + {X86::VMINMAXBF16Zrri, X86::VMINMAXBF16Zrmbi, TB_BCAST_SH}, {X86::VMINMAXPDZ128rri, X86::VMINMAXPDZ128rmbi, TB_BCAST_SD}, {X86::VMINMAXPDZ256rri, X86::VMINMAXPDZ256rmbi, TB_BCAST_SD}, {X86::VMINMAXPDZrri, X86::VMINMAXPDZrmbi, TB_BCAST_SD}, @@ -9231,9 +9231,9 @@ static const X86FoldTableEntry BroadcastTable3[] = { {X86::VMINCPSZ128rrkz, X86::VMINCPSZ128rmbkz, TB_BCAST_SS}, {X86::VMINCPSZ256rrkz, X86::VMINCPSZ256rmbkz, TB_BCAST_SS}, {X86::VMINCPSZrrkz, X86::VMINCPSZrmbkz, TB_BCAST_SS}, - {X86::VMINMAXNEPBF16Z128rrikz, X86::VMINMAXNEPBF16Z128rmbikz, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Z256rrikz, X86::VMINMAXNEPBF16Z256rmbikz, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Zrrikz, X86::VMINMAXNEPBF16Zrmbikz, TB_BCAST_SH}, + {X86::VMINMAXBF16Z128rrikz, X86::VMINMAXBF16Z128rmbikz, TB_BCAST_SH}, + {X86::VMINMAXBF16Z256rrikz, X86::VMINMAXBF16Z256rmbikz, TB_BCAST_SH}, + {X86::VMINMAXBF16Zrrikz, X86::VMINMAXBF16Zrmbikz, TB_BCAST_SH}, {X86::VMINMAXPDZ128rrikz, X86::VMINMAXPDZ128rmbikz, TB_BCAST_SD}, {X86::VMINMAXPDZ256rrikz, X86::VMINMAXPDZ256rmbikz, TB_BCAST_SD}, {X86::VMINMAXPDZrrikz, X86::VMINMAXPDZrmbikz, TB_BCAST_SD}, @@ -10302,9 +10302,9 @@ static const X86FoldTableEntry BroadcastTable4[] = { {X86::VMINCPSZ128rrk, X86::VMINCPSZ128rmbk, TB_BCAST_SS}, {X86::VMINCPSZ256rrk, X86::VMINCPSZ256rmbk, TB_BCAST_SS}, {X86::VMINCPSZrrk, X86::VMINCPSZrmbk, TB_BCAST_SS}, - {X86::VMINMAXNEPBF16Z128rrik, X86::VMINMAXNEPBF16Z128rmbik, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Z256rrik, X86::VMINMAXNEPBF16Z256rmbik, TB_BCAST_SH}, - {X86::VMINMAXNEPBF16Zrrik, X86::VMINMAXNEPBF16Zrmbik, TB_BCAST_SH}, + {X86::VMINMAXBF16Z128rrik, X86::VMINMAXBF16Z128rmbik, TB_BCAST_SH}, + {X86::VMINMAXBF16Z256rrik, X86::VMINMAXBF16Z256rmbik, TB_BCAST_SH}, + {X86::VMINMAXBF16Zrrik, X86::VMINMAXBF16Zrmbik, TB_BCAST_SH}, {X86::VMINMAXPDZ128rrik, X86::VMINMAXPDZ128rmbik, TB_BCAST_SD}, {X86::VMINMAXPDZ256rrik, X86::VMINMAXPDZ256rmbik, TB_BCAST_SD}, {X86::VMINMAXPDZrrik, X86::VMINMAXPDZrmbik, TB_BCAST_SD}, _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
