================
@@ -1448,3 +1448,18 @@ def FeatureTaggedGlobals :
SubtargetFeature<"tagged-globals",
"AllowTaggedGlobals",
"true", "Use an instruction sequence for taking the address of a global "
"that allows a memory tag in the upper address bits">;
+
+def FeatureVendorMIPSCMove : SubtargetFeature<"xmipscmove",
"HasVendorMIPSCMove",
+ "true", "Using CCMov",
+ [Feature64Bit]>;
+def HasVendorMIPSCMove
----------------
topperc wrote:
I think I would rather see this split into `HasVendorMIPSCMove` for assembler,
and `UseCCMovInsn` for isel patterns.
https://github.com/llvm/llvm-project/pull/121394
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