================
@@ -389,6 +390,13 @@ class RISCVPassConfig : public TargetPassConfig {
       DAG->addMutation(createStoreClusterDAGMutation(
           DAG->TII, DAG->TRI, /*ReorderWhileClustering=*/true));
     }
+
+    const RISCVSubtarget &ST = C->MF->getSubtarget<RISCVSubtarget>();
+    if (!ST.getMacroFusions().empty() && ST.useLoadStorePairs()) {
----------------
djtodoro wrote:

Hm, I agree

https://github.com/llvm/llvm-project/pull/121394
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