Author: Vitaly Buka
Date: 2025-01-10T18:11:19-08:00
New Revision: 8af4d206e0f979f68925a08f9dffd60a98ce97e2

URL: 
https://github.com/llvm/llvm-project/commit/8af4d206e0f979f68925a08f9dffd60a98ce97e2
DIFF: 
https://github.com/llvm/llvm-project/commit/8af4d206e0f979f68925a08f9dffd60a98ce97e2.diff

LOG: [NFCI][BoundsChecking] Apply nosanitize on local-bounds instrumentation 
(#122416)

Should be NFCI as we run sanitizer, like msan, before local-bounds.

Added: 
    

Modified: 
    clang/test/CodeGen/allow-ubsan-check.c
    llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
    llvm/test/Instrumentation/BoundsChecking/runtimes.ll

Removed: 
    


################################################################################
diff  --git a/clang/test/CodeGen/allow-ubsan-check.c 
b/clang/test/CodeGen/allow-ubsan-check.c
index a994e700115ff7..fb264ce32ab996 100644
--- a/clang/test/CodeGen/allow-ubsan-check.c
+++ b/clang/test/CodeGen/allow-ubsan-check.c
@@ -181,8 +181,8 @@ void use(double*);
 // CHECK-NEXT:    [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !tbaa 
[[TBAA8:![0-9]+]]
 // CHECK-NEXT:    ret double [[TMP2]]
 // CHECK:       [[TRAP]]:
-// CHECK-NEXT:    call void @__ubsan_handle_local_out_of_bounds_abort() 
#[[ATTR6]]
-// CHECK-NEXT:    unreachable
+// CHECK-NEXT:    call void @__ubsan_handle_local_out_of_bounds_abort() 
#[[ATTR6]], !nosanitize [[META2]]
+// CHECK-NEXT:    unreachable, !nosanitize [[META2]]
 //
 // TR-LABEL: define dso_local double @lbounds(
 // TR-SAME: i32 noundef [[B:%.*]], i32 noundef [[I:%.*]]) local_unnamed_addr 
#[[ATTR0]] {
@@ -198,8 +198,8 @@ void use(double*);
 // TR-NEXT:    [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !tbaa 
[[TBAA7:![0-9]+]]
 // TR-NEXT:    ret double [[TMP2]]
 // TR:       [[TRAP]]:
-// TR-NEXT:    call void @llvm.ubsantrap(i8 3) #[[ATTR5]]
-// TR-NEXT:    unreachable
+// TR-NEXT:    call void @llvm.ubsantrap(i8 3) #[[ATTR5]], !nosanitize 
[[META2]]
+// TR-NEXT:    unreachable, !nosanitize [[META2]]
 //
 // REC-LABEL: define dso_local double @lbounds(
 // REC-SAME: i32 noundef [[B:%.*]], i32 noundef [[I:%.*]]) local_unnamed_addr 
#[[ATTR0]] {
@@ -215,8 +215,8 @@ void use(double*);
 // REC-NEXT:    [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !tbaa 
[[TBAA8:![0-9]+]]
 // REC-NEXT:    ret double [[TMP2]]
 // REC:       [[TRAP]]:
-// REC-NEXT:    call void @__ubsan_handle_local_out_of_bounds() #[[ATTR6]]
-// REC-NEXT:    br label %[[BB1]]
+// REC-NEXT:    call void @__ubsan_handle_local_out_of_bounds() #[[ATTR6]], 
!nosanitize [[META2]]
+// REC-NEXT:    br label %[[BB1]], !nosanitize [[META2]]
 //
 double lbounds(int b, int i) {
   double a[b];

diff  --git a/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp 
b/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
index 10596f87fbcaba..8004552250b471 100644
--- a/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
+++ b/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
@@ -41,7 +41,13 @@ STATISTIC(ChecksAdded, "Bounds checks added");
 STATISTIC(ChecksSkipped, "Bounds checks skipped");
 STATISTIC(ChecksUnable, "Bounds checks unable to add");
 
-using BuilderTy = IRBuilder<TargetFolder>;
+class BuilderTy : public IRBuilder<TargetFolder> {
+public:
+  BuilderTy(BasicBlock *TheBB, BasicBlock::iterator IP, TargetFolder Folder)
+      : IRBuilder<TargetFolder>(TheBB, IP, Folder) {
+    SetNoSanitizeMetadata();
+  }
+};
 
 /// Gets the conditions under which memory accessing instructions will 
overflow.
 ///

diff  --git a/llvm/test/Instrumentation/BoundsChecking/runtimes.ll 
b/llvm/test/Instrumentation/BoundsChecking/runtimes.ll
index 6695e0fa549fa7..ccc7e93615fed2 100644
--- a/llvm/test/Instrumentation/BoundsChecking/runtimes.ll
+++ b/llvm/test/Instrumentation/BoundsChecking/runtimes.ll
@@ -16,113 +16,113 @@ define void @f1(i64 %x) nounwind {
 ; TR-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; TR-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; TR-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; TR-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; TR-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; TR-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; TR-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; TR-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize [[META0:![0-9]+]]
+; TR-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, !nosanitize [[META0]]
+; TR-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize [[META0]]
+; TR-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize [[META0]]
 ; TR-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label %[[BB7:.*]]
 ; TR:       [[BB7]]:
 ; TR-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; TR-NEXT:    ret void
 ; TR:       [[TRAP]]:
-; TR-NEXT:    call void @llvm.trap() #[[ATTR2:[0-9]+]]
-; TR-NEXT:    unreachable
+; TR-NEXT:    call void @llvm.trap() #[[ATTR2:[0-9]+]], !nosanitize [[META0]]
+; TR-NEXT:    unreachable, !nosanitize [[META0]]
 ;
 ; RT-LABEL: define void @f1(
 ; RT-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; RT-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; RT-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; RT-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; RT-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; RT-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; RT-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; RT-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize [[META0:![0-9]+]]
+; RT-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, !nosanitize [[META0]]
+; RT-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize [[META0]]
+; RT-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize [[META0]]
 ; RT-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label %[[BB7:.*]]
 ; RT:       [[BB7]]:
 ; RT-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; RT-NEXT:    ret void
 ; RT:       [[TRAP]]:
-; RT-NEXT:    call void @__ubsan_handle_local_out_of_bounds() #[[ATTR0]]
-; RT-NEXT:    br label %[[BB7]]
+; RT-NEXT:    call void @__ubsan_handle_local_out_of_bounds() #[[ATTR0]], 
!nosanitize [[META0]]
+; RT-NEXT:    br label %[[BB7]], !nosanitize [[META0]]
 ;
 ; TR-NOMERGE-LABEL: define void @f1(
 ; TR-NOMERGE-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; TR-NOMERGE-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; TR-NOMERGE-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; TR-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; TR-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; TR-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; TR-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; TR-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize 
[[META0:![0-9]+]]
+; TR-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, !nosanitize 
[[META0]]
+; TR-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize 
[[META0]]
+; TR-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize 
[[META0]]
 ; TR-NOMERGE-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label %[[BB7:.*]]
 ; TR-NOMERGE:       [[BB7]]:
 ; TR-NOMERGE-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; TR-NOMERGE-NEXT:    ret void
 ; TR-NOMERGE:       [[TRAP]]:
-; TR-NOMERGE-NEXT:    call void @llvm.ubsantrap(i8 3) #[[ATTR2:[0-9]+]]
-; TR-NOMERGE-NEXT:    unreachable
+; TR-NOMERGE-NEXT:    call void @llvm.ubsantrap(i8 3) #[[ATTR2:[0-9]+]], 
!nosanitize [[META0]]
+; TR-NOMERGE-NEXT:    unreachable, !nosanitize [[META0]]
 ;
 ; RT-NOMERGE-LABEL: define void @f1(
 ; RT-NOMERGE-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; RT-NOMERGE-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; RT-NOMERGE-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; RT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; RT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; RT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; RT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; RT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize 
[[META0:![0-9]+]]
+; RT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, !nosanitize 
[[META0]]
+; RT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize 
[[META0]]
+; RT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize 
[[META0]]
 ; RT-NOMERGE-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label %[[BB7:.*]]
 ; RT-NOMERGE:       [[BB7]]:
 ; RT-NOMERGE-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; RT-NOMERGE-NEXT:    ret void
 ; RT-NOMERGE:       [[TRAP]]:
-; RT-NOMERGE-NEXT:    call void @__ubsan_handle_local_out_of_bounds() 
#[[ATTR1:[0-9]+]]
-; RT-NOMERGE-NEXT:    br label %[[BB7]]
+; RT-NOMERGE-NEXT:    call void @__ubsan_handle_local_out_of_bounds() 
#[[ATTR1:[0-9]+]], !nosanitize [[META0]]
+; RT-NOMERGE-NEXT:    br label %[[BB7]], !nosanitize [[META0]]
 ;
 ; RTABORT-NOMERGE-LABEL: define void @f1(
 ; RTABORT-NOMERGE-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; RTABORT-NOMERGE-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; RTABORT-NOMERGE-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; RTABORT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; RTABORT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; RTABORT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; RTABORT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; RTABORT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize 
[[META0:![0-9]+]]
+; RTABORT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, 
!nosanitize [[META0]]
+; RTABORT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize 
[[META0]]
+; RTABORT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize 
[[META0]]
 ; RTABORT-NOMERGE-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label 
%[[BB7:.*]]
 ; RTABORT-NOMERGE:       [[BB7]]:
 ; RTABORT-NOMERGE-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; RTABORT-NOMERGE-NEXT:    ret void
 ; RTABORT-NOMERGE:       [[TRAP]]:
-; RTABORT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_abort() #[[ATTR2:[0-9]+]]
-; RTABORT-NOMERGE-NEXT:    unreachable
+; RTABORT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_abort() #[[ATTR2:[0-9]+]], !nosanitize 
[[META0]]
+; RTABORT-NOMERGE-NEXT:    unreachable, !nosanitize [[META0]]
 ;
 ; MINRT-NOMERGE-LABEL: define void @f1(
 ; MINRT-NOMERGE-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; MINRT-NOMERGE-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; MINRT-NOMERGE-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; MINRT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; MINRT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; MINRT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; MINRT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; MINRT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize 
[[META0:![0-9]+]]
+; MINRT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, !nosanitize 
[[META0]]
+; MINRT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], !nosanitize 
[[META0]]
+; MINRT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], !nosanitize 
[[META0]]
 ; MINRT-NOMERGE-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label %[[BB7:.*]]
 ; MINRT-NOMERGE:       [[BB7]]:
 ; MINRT-NOMERGE-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; MINRT-NOMERGE-NEXT:    ret void
 ; MINRT-NOMERGE:       [[TRAP]]:
-; MINRT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_minimal() #[[ATTR1:[0-9]+]]
-; MINRT-NOMERGE-NEXT:    br label %[[BB7]]
+; MINRT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_minimal() #[[ATTR1:[0-9]+]], !nosanitize 
[[META0]]
+; MINRT-NOMERGE-NEXT:    br label %[[BB7]], !nosanitize [[META0]]
 ;
 ; MINRTABORT-NOMERGE-LABEL: define void @f1(
 ; MINRTABORT-NOMERGE-SAME: i64 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; MINRTABORT-NOMERGE-NEXT:    [[TMP1:%.*]] = mul i64 16, [[X]]
 ; MINRTABORT-NOMERGE-NEXT:    [[TMP2:%.*]] = alloca i128, i64 [[X]], align 8
-; MINRTABORT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0
-; MINRTABORT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16
-; MINRTABORT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]]
-; MINRTABORT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]]
+; MINRTABORT-NOMERGE-NEXT:    [[TMP3:%.*]] = sub i64 [[TMP1]], 0, !nosanitize 
[[META0:![0-9]+]]
+; MINRTABORT-NOMERGE-NEXT:    [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 16, 
!nosanitize [[META0]]
+; MINRTABORT-NOMERGE-NEXT:    [[TMP5:%.*]] = or i1 false, [[TMP4]], 
!nosanitize [[META0]]
+; MINRTABORT-NOMERGE-NEXT:    [[TMP6:%.*]] = or i1 false, [[TMP5]], 
!nosanitize [[META0]]
 ; MINRTABORT-NOMERGE-NEXT:    br i1 [[TMP6]], label %[[TRAP:.*]], label 
%[[BB7:.*]]
 ; MINRTABORT-NOMERGE:       [[BB7]]:
 ; MINRTABORT-NOMERGE-NEXT:    [[TMP8:%.*]] = load i128, ptr [[TMP2]], align 4
 ; MINRTABORT-NOMERGE-NEXT:    ret void
 ; MINRTABORT-NOMERGE:       [[TRAP]]:
-; MINRTABORT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_minimal_abort() #[[ATTR2:[0-9]+]]
-; MINRTABORT-NOMERGE-NEXT:    unreachable
+; MINRTABORT-NOMERGE-NEXT:    call void 
@__ubsan_handle_local_out_of_bounds_minimal_abort() #[[ATTR2:[0-9]+]], 
!nosanitize [[META0]]
+; MINRTABORT-NOMERGE-NEXT:    unreachable, !nosanitize [[META0]]
 ;
   %1 = alloca i128, i64 %x
   %3 = load i128, ptr %1, align 4
@@ -154,3 +154,17 @@ define void @f1(i64 %x) nounwind {
 ; MINRTABORT-NOMERGE: attributes #[[ATTR1:[0-9]+]] = { noreturn nounwind }
 ; MINRTABORT-NOMERGE: attributes #[[ATTR2]] = { nomerge noreturn nounwind }
 ;.
+; TR: [[META0]] = !{}
+;.
+; RT: [[META0]] = !{}
+;.
+; TR-NOMERGE: [[META0]] = !{}
+;.
+; RT-NOMERGE: [[META0]] = !{}
+;.
+; RTABORT-NOMERGE: [[META0]] = !{}
+;.
+; MINRT-NOMERGE: [[META0]] = !{}
+;.
+; MINRTABORT-NOMERGE: [[META0]] = !{}
+;.


        
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