Author: Jonathan Thackray Date: 2024-12-20T17:27:08Z New Revision: 952c8d305459d3f1218d1ce12c7f20b6a10ba046
URL: https://github.com/llvm/llvm-project/commit/952c8d305459d3f1218d1ce12c7f20b6a10ba046 DIFF: https://github.com/llvm/llvm-project/commit/952c8d305459d3f1218d1ce12c7f20b6a10ba046.diff LOG: [AArch64] Enable FEAT_SVE2p1 by default for Armv9.4-A and later (#120753) The ArmARM says: ``` "In an Armv9.4 implementation, if FEAT_SVE2 is implemented, FEAT_SVE2p1 is implemented." ``` Since FEAT_SVE2 is already enabled for Armv9.0-A and later, then FEAT_SVE2p1 should also be enabled by default. Added: Modified: clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c llvm/lib/Target/AArch64/AArch64Features.td Removed: ################################################################################ diff --git a/clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c b/clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c index 0032c926c22d96..1cfda6c996b9e3 100644 --- a/clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c +++ b/clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c @@ -58,6 +58,7 @@ // CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit // CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions // CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions +// CHECK-NEXT: FEAT_SVE2p1 Enable Scalable Vector Extension 2.1 instructions // CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions // CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension // CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension diff --git a/clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c b/clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c index be24bd0bbddb68..76c8b34a56b75b 100644 --- a/clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c +++ b/clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c @@ -61,6 +61,7 @@ // CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit // CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions // CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions +// CHECK-NEXT: FEAT_SVE2p1 Enable Scalable Vector Extension 2.1 instructions // CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions // CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension // CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td index 3a6bef81f4a0d8..41eb9a73bd013d 100644 --- a/llvm/lib/Target/AArch64/AArch64Features.td +++ b/llvm/lib/Target/AArch64/AArch64Features.td @@ -874,7 +874,7 @@ def HasV9_3aOps : Architecture64<9, 3, "a", "v9.3a", def HasV9_4aOps : Architecture64<9, 4, "a", "v9.4a", [HasV8_9aOps, HasV9_3aOps], !listconcat(HasV9_3aOps.DefaultExts, [FeatureSPECRES2, FeatureCSSC, - FeatureRASv2])>; + FeatureRASv2, FeatureSVE2p1])>; def HasV9_5aOps : Architecture64<9, 5, "a", "v9.5a", [HasV9_4aOps, FeatureCPA], !listconcat(HasV9_4aOps.DefaultExts, [FeatureCPA, FeatureLUT, FeatureFAMINMAX])>; _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
