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``````````bash
git-clang-format --diff d5fe6332c9f25590b9878ad31d6461ea581e0fa5
b069337d461da42883093aedeb00c019131d3559 --extensions h --
clang/lib/Headers/avx10_2convertintrin.h
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diff --git a/clang/lib/Headers/avx10_2convertintrin.h
b/clang/lib/Headers/avx10_2convertintrin.h
index 52a64a5309..38d9f1982b 100644
--- a/clang/lib/Headers/avx10_2convertintrin.h
+++ b/clang/lib/Headers/avx10_2convertintrin.h
@@ -143,7 +143,7 @@ _mm_maskz_cvtx2ps_ph(__mmask8 __U, __m128 __A, __m128 __B) {
/// containing FP16 elements.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF i < 8
/// dst.fp16[i] := convert_fp32_to_fp16(__B.fp32[i])
/// ELSE
@@ -220,7 +220,7 @@ _mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256
__A, __m256 __B) {
/// element should be zeroed instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF mask[i]
/// IF i < 8
/// dst.fp16[i] := convert_fp32_to_fp16(__B.fp32[i])
@@ -260,7 +260,7 @@ _mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256
__B) {
/// containing FP16 elements. Rounding mode \a __R needs to be provided.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF i < 8
/// dst.fp16[i] := convert_fp32_to_fp16(__B.fp32[i])
/// ELSE
@@ -279,9 +279,9 @@ _mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256
__B) {
/// A 256-bit vector of [8 x float].
/// \param __R
/// Rounding mode. Valid inputs are: _MM_FROUND_CUR_DIRECTION or
-/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
following:
-/// _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF, _MM_FROUND_TO_POS_INF,
-/// _MM_FROUND_TO_ZERO.
+/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
+/// following: _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF,
+/// _MM_FROUND_TO_POS_INF, _MM_FROUND_TO_ZERO.
/// \returns
/// A 256-bit vector of [16 x fp16]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
@@ -325,9 +325,9 @@ _mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256
__B) {
/// A 256-bit vector of [8 x float].
/// \param __R
/// Rounding mode. Valid inputs are: _MM_FROUND_CUR_DIRECTION or
-/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
following:
-/// _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF, _MM_FROUND_TO_POS_INF,
-/// _MM_FROUND_TO_ZERO.
+/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
+/// following: _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF,
+/// _MM_FROUND_TO_POS_INF, _MM_FROUND_TO_ZERO.
/// \returns
/// A 256-bit vector of [16 x fp16]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
@@ -343,7 +343,7 @@ _mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256
__B) {
/// element should be zeroed instead. Rounding mode \a __R needs to be
provided.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF mask[i]
/// IF i < 8
/// dst.fp16[i] := convert_fp32_to_fp16(__B.fp32[i])
@@ -368,9 +368,9 @@ _mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256
__B) {
/// A 256-bit vector of [8 x float].
/// \param __R
/// Rounding mode. Valid inputs are: _MM_FROUND_CUR_DIRECTION or
-/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
following:
-/// _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF, _MM_FROUND_TO_POS_INF,
-/// _MM_FROUND_TO_ZERO.
+/// result of bitwise or of _MM_FROUND_NO_EXC with at most one of the
+/// following: _MM_FROUND_TO_NEAREST_INT, _MM_FROUND_TO_NEG_INF,
+/// _MM_FROUND_TO_POS_INF, _MM_FROUND_TO_ZERO.
/// \returns
/// A 256-bit vector of [16 x fp16]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
@@ -421,9 +421,8 @@ _mm_cvtbiasph_pbf8(__m128i __A, __m128h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR
///
/// dst[127:64] := 0
/// \endcode
@@ -459,10 +458,8 @@ _mm_mask_cvtbiasph_pbf8(__m128i __W, __mmask8 __U, __m128i
__A, __m128h __B) {
/// \code{.operation}
/// FOR i := 0 to 7
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
///
/// dst[127:64] := 0
@@ -528,10 +525,8 @@ _mm256_cvtbiasph_pbf8(__m256i __A, __m256h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
-/// \endcode
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR \endcode
///
/// \headerfile <immintrin.h>
///
@@ -564,10 +559,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtbiasph_pbf8(
/// \code{.operation}
/// FOR i := 0 to 15
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
/// \endcode
///
@@ -633,9 +626,8 @@ _mm_cvtbiassph_pbf8(__m128i __A, __m128h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR
///
/// dst[127:64] := 0
/// \endcode
@@ -671,10 +663,8 @@ _mm_mask_cvtbiassph_pbf8(__m128i __W, __mmask8 __U,
__m128i __A, __m128h __B) {
/// \code{.operation}
/// FOR i := 0 to 7
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
///
/// dst[127:64] := 0
@@ -741,10 +731,8 @@ _mm256_cvtbiassph_pbf8(__m256i __A, __m256h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
-/// \endcode
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR \endcode
///
/// \headerfile <immintrin.h>
///
@@ -777,10 +765,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtbiassph_pbf8(
/// \code{.operation}
/// FOR i := 0 to 15
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
/// \endcode
///
@@ -845,9 +831,8 @@ _mm_cvtbiasph_phf8(__m128i __A, __m128h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR
///
/// dst[127:64] := 0
/// \endcode
@@ -883,10 +868,8 @@ _mm_mask_cvtbiasph_phf8(__m128i __W, __mmask8 __U, __m128i
__A, __m128h __B) {
/// \code{.operation}
/// FOR i := 0 to 7
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
///
/// dst[127:64] := 0
@@ -952,10 +935,8 @@ _mm256_cvtbiasph_phf8(__m256i __A, __m256h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
-/// \endcode
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR \endcode
///
/// \headerfile <immintrin.h>
///
@@ -981,17 +962,15 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtbiasph_phf8(
/// Add two 256-bit vectors, \a __A and \a __B, containing packed FP16
/// floating-point elements and 8-bit integers stored in the lower half of
-/// packed 16-bit integers, respectively. Results are converted to FP8 E4M3
+/// packed 16-bit integers, respectively. Results are converted to FP8 E4M3
/// Merging mask \a __U is used to determine if given element should be taken
/// from \a __W instead.
///
/// \code{.operation}
/// FOR i := 0 to 15
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
/// \endcode
///
@@ -1057,9 +1036,8 @@ _mm_cvtbiassph_phf8(__m128i __A, __m128h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR
///
/// dst[127:64] := 0
/// \endcode
@@ -1095,10 +1073,8 @@ _mm_mask_cvtbiassph_phf8(__m128i __W, __mmask8 __U,
__m128i __A, __m128h __B) {
/// \code{.operation}
/// FOR i := 0 to 7
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
///
/// dst[127:64] := 0
@@ -1165,10 +1141,8 @@ _mm256_cvtbiassph_phf8(__m256i __A, __m256h __B) {
/// IF __U[i]
/// dst.fp8[i] := _W[i]
/// ELSE
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// FI
-/// ENDFOR
-/// \endcode
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+/// __B.int8[2i]) FI ENDFOR \endcode
///
/// \headerfile <immintrin.h>
///
@@ -1201,10 +1175,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtbiassph_phf8(
/// \code{.operation}
/// FOR i := 0 to 15
/// IF __U[i]
-/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
__B.int8[2i])
-/// ELSE
-/// dst.fp8[i] := 0
-/// FI
+/// dst.fp8[i] := add_convert_fp16_to_fp8_bias(__A.fp16[i],
+///__B.int8[2i]) ELSE dst.fp8[i] := 0 FI
/// ENDFOR
/// \endcode
///
@@ -1233,7 +1205,7 @@ _mm256_maskz_cvtbiassph_phf8(__mmask16 __U, __m256i __A,
__m256h __B) {
/// floating-point elements to a 128-bit vector containing E5M2 FP8 elements.
///
/// \code{.operation}
-/// FOR i := 0 to 16
+/// FOR i := 0 to 16
/// IF i < 8
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
@@ -1308,7 +1280,7 @@ _mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// instead.
///
/// \code{.operation}
-/// FOR i := 0 to 16
+/// FOR i := 0 to 16
/// IF __U[i]
/// IF i < 8
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
@@ -1334,8 +1306,8 @@ _mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// \returns
/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_maskz_cvtne2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_selectb_128(
@@ -1347,8 +1319,8 @@ _mm_maskz_cvtne2ph_pbf8(__mmask16 __U, __m128h __A,
__m128h __B) {
/// floating-point elements to a 256-bit vector containing E5M2 FP8 elements.
///
/// \code{.operation}
-/// FOR i := 0 to 31
-/// IF i < 16
+/// FOR i := 0 to 31
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1380,11 +1352,11 @@ _mm256_cvtne2ph_pbf8(__m256h __A, __m256h __B) {
/// from \a __W instead.
///
/// \code{.operation}
-/// FOR i := 0 to 31
+/// FOR i := 0 to 31
/// IF __U[i]
/// dst.fp8[i] := __W.fp8[i]
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1422,11 +1394,11 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtne2ph_pbf8(
/// instead.
///
/// \code{.operation}
-/// FOR i := 0 to 31
+/// FOR i := 0 to 31
/// IF __U[i]
/// dst.fp8[i] := 0
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1462,7 +1434,7 @@ _mm256_maskz_cvtne2ph_pbf8(__mmask32 __U, __m256h __A,
__m256h __B) {
/// Resulting elements are saturated in case of an overflow.
///
/// \code{.operation}
-/// FOR i := 0 to 16
+/// FOR i := 0 to 16
/// IF i < 8
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
@@ -1492,10 +1464,11 @@ _mm_cvtnes2ph_pbf8(__m128h __A, __m128h __B) {
/// Convert two 128-bit vectors, \a __A and \a __B, containing packed FP16
/// floating-point elements to a 128-bit vector containing E5M2 FP8 elements.
/// Merging mask \a __U is used to determine if given element should be taken
-/// from \a __W instead. Resulting elements are saturated in case of an
overflow.
+/// from \a __W instead. Resulting elements are saturated in case of an
+/// overflow.
///
/// \code{.operation}
-/// FOR i := 0 to 16
+/// FOR i := 0 to 16
/// IF __U[i]
/// dst.fp8[i] := __W[i]
/// ELSE
@@ -1563,8 +1536,8 @@ _mm_mask_cvtnes2ph_pbf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// \returns
/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_maskz_cvtnes2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_selectb_128(
@@ -1578,7 +1551,7 @@ _mm_maskz_cvtnes2ph_pbf8(__mmask16 __U, __m128h __A,
__m128h __B) {
///
/// \code{.operation}
/// FOR i := 0 to 31
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1607,14 +1580,15 @@ _mm256_cvtnes2ph_pbf8(__m256h __A, __m256h __B) {
/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
/// floating-point elements to a 256-bit vector containing E5M2 FP8 elements.
/// Merging mask \a __U is used to determine if given element should be taken
-/// from \a __W instead. Resulting elements are saturated in case of an
overflow.
+/// from \a __W instead. Resulting elements are saturated in case of an
+/// overflow.
///
/// \code{.operation}
/// FOR i := 0 to 31
/// IF __U[i]
/// dst.fp8[i] := __W.fp8[i]
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1656,7 +1630,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtnes2ph_pbf8(
/// IF __U[i]
/// dst.fp8[i] := 0
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1766,7 +1740,7 @@ _mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// IF i < 8
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
@@ -1792,8 +1766,8 @@ _mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// \returns
/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_maskz_cvtne2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_selectb_128(
@@ -1806,7 +1780,7 @@ _mm_maskz_cvtne2ph_phf8(__mmask16 __U, __m128h __A,
__m128h __B) {
///
/// \code{.operation}
/// FOR i := 0 to 31
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1842,7 +1816,7 @@ _mm256_cvtne2ph_phf8(__m256h __A, __m256h __B) {
/// IF __U[i]
/// dst.fp8[i] := __W.fp8[i]
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1884,7 +1858,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtne2ph_phf8(
/// IF __U[i]
/// dst.fp8[i] := 0
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -1950,7 +1924,8 @@ _mm_cvtnes2ph_phf8(__m128h __A, __m128h __B) {
/// Convert two 128-bit vectors, \a __A and \a __B, containing packed FP16
/// floating-point elements to a 128-bit vector containing E4M3 FP8 elements.
/// Merging mask \a __U is used to determine if given element should be taken
-/// from \a __W instead. Resulting elements are saturated in case of an
overflow.
+/// from \a __W instead. Resulting elements are saturated in case of an
+/// overflow.
///
/// \code{.operation}
/// FOR i := 0 to 15
@@ -2021,8 +1996,8 @@ _mm_mask_cvtnes2ph_phf8(__m128i __W, __mmask16 __U,
__m128h __A, __m128h __B) {
/// \returns
/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
/// (converted) elements from \a __B; higher order elements correspond to
the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_maskz_cvtnes2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_selectb_128(
@@ -2065,14 +2040,15 @@ _mm256_cvtnes2ph_phf8(__m256h __A, __m256h __B) {
/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
/// floating-point elements to a 256-bit vector containing E4M3 FP8 elements.
/// Merging mask \a __U is used to determine if given element should be taken
-/// from \a __W instead. Resulting elements are saturated in case of an
overflow.
+/// from \a __W instead. Resulting elements are saturated in case of an
+/// overflow.
///
/// \code{.operation}
/// FOR i := 0 to 31
/// IF __U[i]
/// dst.fp8[i] := __W.fp8[i]
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -2110,11 +2086,11 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_mask_cvtnes2ph_phf8(
/// instead. Resulting elements are saturated in case of an overflow.
///
/// \code{.operation}
-/// FOR i := 0 to 31
+/// FOR i := 0 to 31
/// IF __U[i]
/// dst.fp8[i] := 0
/// ELSE
-/// IF i < 16
+/// IF i < 16
/// dst.fp8[i] := convert_fp16_to_fp8(__B.fp16[i])
/// ELSE
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i - 16])
@@ -2146,7 +2122,8 @@ _mm256_maskz_cvtnes2ph_phf8(__mmask32 __U, __m256h __A,
__m256h __B) {
}
/// Convert 128-bit vector \a __A, containing packed FP8 E4M3 floating-point
-/// elements to a 128-bit vector containing FP16 elements. The conversion is
exact.
+/// elements to a 128-bit vector containing FP16 elements. The conversion is
+/// exact.
///
/// \code{.operation}
/// FOR i := 0 to 7
@@ -2228,8 +2205,8 @@ _mm_mask_cvtnehf8_ph(__m128h __W, __mmask8 __U, __m128i
__A) {
/// A 128-bit vector of [16 x fp8].
/// \returns
/// A 128-bit vector of [8 x fp16]. Resulting elements correspond to the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128h __DEFAULT_FN_ATTRS128
_mm_maskz_cvtnehf8_ph(__mmask8 __U, __m128i __A) {
return (__m128h)__builtin_ia32_vcvthf8_2ph128_mask(
@@ -2237,7 +2214,8 @@ _mm_maskz_cvtnehf8_ph(__mmask8 __U, __m128i __A) {
}
/// Convert 256-bit vector \a __A, containing packed FP8 E4M3 floating-point
-/// elements to a 256-bit vector containing FP16 elements. The conversion is
exact.
+/// elements to a 256-bit vector containing FP16 elements. The conversion is
+/// exact.
///
/// \code{.operation}
/// FOR i := 0 to 15
@@ -2266,7 +2244,7 @@ _mm256_cvtnehf8_ph(__m128i __A) {
/// taken from \a __W instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp16[i] := __W[i]
/// ELSE
@@ -2301,7 +2279,7 @@ _mm256_mask_cvtnehf8_ph(__m256h __W, __mmask16 __U,
__m128i __A) {
/// zeroed instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp16[i] := convert_fp8_to_fp16(__B.fp8[i])
/// ELSE
@@ -2320,8 +2298,8 @@ _mm256_mask_cvtnehf8_ph(__m256h __W, __mmask16 __U,
__m128i __A) {
/// A 256-bit vector of [32 x fp8].
/// \returns
/// A 256-bit vector of [16 x fp16]. Resulting elements correspond to the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_maskz_cvtnehf8_ph(__mmask16 __U, __m128i __A) {
return (__m256h)__builtin_ia32_vcvthf8_2ph256_mask(
@@ -2347,8 +2325,8 @@ _mm256_maskz_cvtnehf8_ph(__mmask16 __U, __m128i __A) {
/// \param __A
/// A 128-bit vector of [8 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
(converted)
-/// elements from \a __A; upper elements are zeroed.
+/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
+/// (converted) elements from \a __A; upper elements are zeroed.
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtneph_pbf8(__m128h __A) {
return (__m128i)__builtin_ia32_vcvtneph2bf8_128_mask(
(__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
@@ -2444,8 +2422,8 @@ _mm_maskz_cvtneph_pbf8(__mmask8 __U, __m128h __A) {
/// \param __A
/// A 256-bit vector of [16 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
(converted)
-/// elements from \a __A.
+/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
+/// (converted) elements from \a __A.
static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_cvtneph_pbf8(__m256h __A) {
return (__m128i)__builtin_ia32_vcvtneph2bf8_256_mask(
@@ -2541,8 +2519,8 @@ _mm256_maskz_cvtneph_pbf8(__mmask16 __U, __m256h __A) {
/// \param __A
/// A 128-bit vector of [8 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
(converted)
-/// elements from \a __A; upper elements are zeroed.
+/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
+/// (converted) elements from \a __A; upper elements are zeroed.
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtnesph_pbf8(__m128h __A)
{
return (__m128i)__builtin_ia32_vcvtneph2bf8s_128_mask(
(__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
@@ -2638,8 +2616,8 @@ _mm_maskz_cvtnesph_pbf8(__mmask8 __U, __m128h __A) {
/// \param __A
/// A 256-bit vector of [16 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
(converted)
-/// elements from \a __A.
+/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
+/// (converted) elements from \a __A.
static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_cvtnesph_pbf8(__m256h __A) {
return (__m128i)__builtin_ia32_vcvtneph2bf8s_256_mask(
@@ -2689,7 +2667,7 @@ _mm256_mask_cvtnesph_pbf8(__m128i __W, __mmask16 __U,
__m256h __A) {
/// instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i])
/// ELSE
@@ -2737,8 +2715,8 @@ _mm256_maskz_cvtnesph_pbf8(__mmask16 __U, __m256h __A) {
/// \param __A
/// A 128-bit vector of [8 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
(converted)
-/// elements from \a __A; upper elements are zeroed.
+/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
+/// (converted) elements from \a __A; upper elements are zeroed.
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtneph_phf8(__m128h __A) {
return (__m128i)__builtin_ia32_vcvtneph2hf8_128_mask(
(__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
@@ -2834,8 +2812,8 @@ _mm_maskz_cvtneph_phf8(__mmask8 __U, __m128h __A) {
/// \param __A
/// A 256-bit vector of [16 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
(converted)
-/// elements from \a __A.
+/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
+/// (converted) elements from \a __A.
static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_cvtneph_phf8(__m256h __A) {
return (__m128i)__builtin_ia32_vcvtneph2hf8_256_mask(
@@ -2931,8 +2909,8 @@ _mm256_maskz_cvtneph_phf8(__mmask16 __U, __m256h __A) {
/// \param __A
/// A 128-bit vector of [8 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
(converted)
-/// elements from \a __A; upper elements are zeroed.
+/// A 128-bit vector of [16 x fp8]. Lower elements correspond to the
+/// (converted) elements from \a __A; upper elements are zeroed.
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtnesph_phf8(__m128h __A)
{
return (__m128i)__builtin_ia32_vcvtneph2hf8s_128_mask(
(__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
@@ -3028,8 +3006,8 @@ _mm_maskz_cvtnesph_phf8(__mmask8 __U, __m128h __A) {
/// \param __A
/// A 256-bit vector of [16 x fp16].
/// \returns
-/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
(converted)
-/// elements from \a __A.
+/// A 128-bit vector of [16 x fp8]. Resulting elements correspond to the
+/// (converted) elements from \a __A.
static __inline__ __m128i __DEFAULT_FN_ATTRS256
_mm256_cvtnesph_phf8(__m256h __A) {
return (__m128i)__builtin_ia32_vcvtneph2hf8s_256_mask(
@@ -3079,7 +3057,7 @@ _mm256_mask_cvtnesph_phf8(__m128i __W, __mmask16 __U,
__m256h __A) {
/// instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp8[i] := convert_fp16_to_fp8(__A.fp16[i])
/// ELSE
@@ -3109,7 +3087,8 @@ _mm256_maskz_cvtnesph_phf8(__mmask16 __U, __m256h __A) {
}
/// Convert 128-bit vector \a __A, containing packed FP8 E5M2 floating-point
-/// elements to a 128-bit vector containing FP16 elements. The conversion is
exact.
+/// elements to a 128-bit vector containing FP16 elements. The conversion is
+/// exact.
///
/// \code{.operation}
/// FOR i := 0 to 7
@@ -3190,15 +3169,16 @@ _mm_mask_cvtpbf8_ph(__m128h __S, __mmask8 __U, __m128i
__A) {
/// A 128-bit vector of [16 x fp8].
/// \returns
/// A 128-bit vector of [8 x fp16]. Resulting elements correspond to the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m128h __DEFAULT_FN_ATTRS128
_mm_maskz_cvtpbf8_ph(__mmask8 __U, __m128i __A) {
return _mm_castsi128_ph(_mm_slli_epi16(_mm_maskz_cvtepi8_epi16(__U, __A),
8));
}
/// Convert 256-bit vector \a __A, containing packed FP8 E4M3 floating-point
-/// elements to a 256-bit vector containing FP16 elements. The conversion is
exact.
+/// elements to a 256-bit vector containing FP16 elements. The conversion is
+/// exact.
///
/// \code{.operation}
/// FOR i := 0 to 15
@@ -3225,7 +3205,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_cvtpbf8_ph(__m128i __A) {
/// taken from \a __W instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp16[i] := __W[i]
/// ELSE
@@ -3260,7 +3240,7 @@ _mm256_mask_cvtpbf8_ph(__m256h __S, __mmask8 __U, __m128i
__A) {
/// zeroed instead.
///
/// \code{.operation}
-/// FOR i := 0 to 15
+/// FOR i := 0 to 15
/// IF __U[i]
/// dst.fp16[i] := convert_fp8_to_fp16(__B.fp8[i])
/// ELSE
@@ -3279,8 +3259,8 @@ _mm256_mask_cvtpbf8_ph(__m256h __S, __mmask8 __U, __m128i
__A) {
/// A 256-bit vector of [32 x fp8].
/// \returns
/// A 256-bit vector of [16 x fp16]. Resulting elements correspond to the
-/// (converted) elements from \a __A. If corresponding mask bit is not set,
then
-/// zero is taken instead.
+/// (converted) elements from \a __A. If corresponding mask bit is not set,
+/// then zero is taken instead.
static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_maskz_cvtpbf8_ph(__mmask8 __U, __m128i __A) {
return _mm256_castsi256_ph(
``````````
</details>
https://github.com/llvm/llvm-project/pull/120766
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