================ @@ -3606,6 +3613,32 @@ bool SPIRVInstructionSelector::selectSpvThreadId(Register ResVReg, return Result && MIB.constrainAllUses(TII, TRI, RBI); } +bool SPIRVInstructionSelector::selectSpvThreadId(Register ResVReg, + const SPIRVType *ResType, + MachineInstr &I) const { + // DX intrinsic: @llvm.dx.thread.id(i32) + // ID Name Description + // 93 ThreadId reads the thread ID + // + // In SPIR-V, llvm.dx.thread.id maps to a `GlobalInvocationId` builtin + // variable ---------------- tex3d wrote:
This comment block seems odd, since we should be translating a SPIRV intrinsic: `@llvm.spv.thread.id`, not a DX intrinsic. Same for the one in `selectSpvGroupThreadId`. https://github.com/llvm/llvm-project/pull/117781 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits