================
@@ -2694,19 +2694,49 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register 
ResVReg,
     }
     return MIB.constrainAllUses(TII, TRI, RBI);
   }
-  case Intrinsic::spv_loop_merge:
-  case Intrinsic::spv_selection_merge: {
-    const auto Opcode = IID == Intrinsic::spv_selection_merge
-                            ? SPIRV::OpSelectionMerge
-                            : SPIRV::OpLoopMerge;
-    auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode));
+  case Intrinsic::spv_loop_merge: {
+    auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpLoopMerge));
     for (unsigned i = 1; i < I.getNumExplicitOperands(); ++i) {
       assert(I.getOperand(i).isMBB());
       MIB.addMBB(I.getOperand(i).getMBB());
     }
     MIB.addImm(SPIRV::SelectionControl::None);
     return MIB.constrainAllUses(TII, TRI, RBI);
   }
+  case Intrinsic::spv_selection_merge: {
+
+    auto SelectionControl = SPIRV::SelectionControl::None;
+    auto LastOp = I.getOperand(I.getNumExplicitOperands() - 1);
----------------
Keenuts wrote:

> ```c++
>   def int_spv_loop_merge : Intrinsic<[], [llvm_vararg_ty]>;
> ```

Assuming you meant to mention only `OpSelectionMerge` and not `OpLoopMerge`.


> The suggested solution, requires me to change into this:
> ```c++
>   def int_spv_selection_merge : Intrinsic<[], [llvm_i32_ty,llvm_vararg_ty], 
> [ImmArg<ArgIndex<0>>]>;
> ```

`OpSelectionMerge` has a fixed number of operands 
[(spec)](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpSelectionMerge):
This means you should be able to do this:

```
def int_spv_selection_merge : Intrinsic<[], [llvm_any_ty, llvm_i32_ty]>
```

Respecting the order of operands of the SPIR-V instruction, hence you shouldn't 
have to modify the code dealing with it.
So it looks like if you change the intrinsic to have those fixed arguments, you 
should be able to emit the mask in the frontend when generating the intrinsic 
call. If you do so, this lowering code will become way simpler.



https://github.com/llvm/llvm-project/pull/116331
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