[clang] [llvm] [RISCV] Add Qualcomm uC Xqcisls (Scaled Load Store) extension (PR #117987)

[Sam Elliott via cfe-commits]

================
@@ -771,9 +772,11 @@ Error RISCVISAInfo::checkDependency() {
       return getIncompatibleError("xwchc", "zcb");
   }
 
-  if (Exts.count("xqcicsr") != 0 && (XLen != 32)) {
-    return getError("'xqcicsr' is only supported for 'rv32'");
-  }
+  for (auto Ext : XqciExts)
+    if (Exts.count(Ext.str()) && (XLen != 32))
+      return createStringError(errc::invalid_argument,
+                               "'" + Twine(Ext) + "'" +
+                                   " is only supported for 'rv32'");
----------------
lenary wrote:

There aren't any tests for this error - please may you add some in 
`RISCVISAInfoTest.cpp`?

https://github.com/llvm/llvm-project/pull/117987
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits