Author: Wang Pengcheng Date: 2024-11-22T20:12:28+08:00 New Revision: b36fcf4f493ad9d30455e178076d91be99f3a7d8
URL: https://github.com/llvm/llvm-project/commit/b36fcf4f493ad9d30455e178076d91be99f3a7d8 DIFF: https://github.com/llvm/llvm-project/commit/b36fcf4f493ad9d30455e178076d91be99f3a7d8.diff LOG: [RISCV] Rename variable CPUModel to Model The variable name can't be the same as the struct name or we will have "error: declaration of ‘llvm::RISCV::CPUModel llvm::RISCV::CPUInfo::CPUModel’ changes meaning of ‘CPUModel’ [-fpermissive]". Added: Modified: clang/lib/CodeGen/CGBuiltin.cpp llvm/include/llvm/TargetParser/RISCVTargetParser.h llvm/lib/TargetParser/RISCVTargetParser.cpp Removed: ################################################################################ diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index caf5e40429838b..4b96bdb709c777 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -22715,22 +22715,22 @@ Value *CodeGenFunction::EmitRISCVCpuIs(StringRef CPUStr) { return CPUID; }; - const llvm::RISCV::CPUModel CPUModel = llvm::RISCV::getCPUModel(CPUStr); + const llvm::RISCV::CPUModel Model = llvm::RISCV::getCPUModel(CPUStr); // Compare mvendorid. Value *VendorID = loadRISCVCPUID(0); Value *Result = - Builder.CreateICmpEQ(VendorID, Builder.getInt32(CPUModel.MVendorID)); + Builder.CreateICmpEQ(VendorID, Builder.getInt32(Model.MVendorID)); // Compare marchid. Value *ArchID = loadRISCVCPUID(1); Result = Builder.CreateAnd( - Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(CPUModel.MArchID))); + Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(Model.MArchID))); // Compare mimpid. Value *ImpID = loadRISCVCPUID(2); Result = Builder.CreateAnd( - Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(CPUModel.MImpID))); + Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(Model.MImpID))); return Result; } diff --git a/llvm/include/llvm/TargetParser/RISCVTargetParser.h b/llvm/include/llvm/TargetParser/RISCVTargetParser.h index 71035dbe10e5e0..c237e1ddd6b381 100644 --- a/llvm/include/llvm/TargetParser/RISCVTargetParser.h +++ b/llvm/include/llvm/TargetParser/RISCVTargetParser.h @@ -43,7 +43,7 @@ struct CPUInfo { StringLiteral DefaultMarch; bool FastScalarUnalignedAccess; bool FastVectorUnalignedAccess; - CPUModel CPUModel; + CPUModel Model; bool is64Bit() const { return DefaultMarch.starts_with("rv64"); } }; diff --git a/llvm/lib/TargetParser/RISCVTargetParser.cpp b/llvm/lib/TargetParser/RISCVTargetParser.cpp index 3442f74fb7f249..625645a99e12fc 100644 --- a/llvm/lib/TargetParser/RISCVTargetParser.cpp +++ b/llvm/lib/TargetParser/RISCVTargetParser.cpp @@ -58,16 +58,15 @@ bool hasFastVectorUnalignedAccess(StringRef CPU) { } bool hasValidCPUModel(StringRef CPU) { - const CPUModel CPUModel = getCPUModel(CPU); - return CPUModel.MVendorID != 0 && CPUModel.MArchID != 0 && - CPUModel.MImpID != 0; + const CPUModel Model = getCPUModel(CPU); + return Model.MVendorID != 0 && Model.MArchID != 0 && Model.MImpID != 0; } CPUModel getCPUModel(StringRef CPU) { const CPUInfo *Info = getCPUInfoByName(CPU); if (!Info) return {0, 0, 0}; - return Info->CPUModel; + return Info->Model; } bool parseCPU(StringRef CPU, bool IsRV64) { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
