================ @@ -1949,24 +1955,48 @@ bool SPIRVInstructionSelector::selectSign(Register ResVReg, return Result; } +bool SPIRVInstructionSelector::selectWaveNOpInst(Register ResVReg, + const SPIRVType *ResType, + MachineInstr &I, + unsigned Opcode, + unsigned OperandCount) const { + assert(I.getNumOperands() == OperandCount); ---------------- V-FEXrt wrote:
Especially since the value is statically known for each opcode https://github.com/llvm/llvm-project/pull/115902 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits