================
@@ -10441,15 +10441,14 @@ class sve2p1_extq<string mnemonic>
multiclass sve2p1_extq<string mnemonic, SDPatternOperator Op> {
def NAME : sve2p1_extq<mnemonic>;
def : SVE_3_Op_Imm_Pat<nxv16i8, Op, nxv16i8, nxv16i8, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv8i16, Op, nxv8i16, nxv8i16, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv4i32, Op, nxv4i32, nxv4i32, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv2i64, Op, nxv2i64, nxv2i64, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
-
- def : SVE_3_Op_Imm_Pat<nxv8f16, Op, nxv8f16, nxv8f16, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv4f32, Op, nxv4f32, nxv4f32, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv2f64, Op, nxv2f64, nxv2f64, i32, timm32_0_15,
!cast<Instruction>(NAME)>;
- def : SVE_3_Op_Imm_Pat<nxv8bf16, Op, nxv8bf16, nxv8bf16, i32, timm32_0_15,
!cast<Instruction>(NAME
-)>;
+ def : SVE_3_Op_Imm_Pat<nxv8i16, Op, nxv8i16, nxv8i16, i32,
extq_timm32_0_7m2, !cast<Instruction>(NAME)>;
----------------
CarolineConcatto wrote:
I am not sure this is correct too.
Maybe it needs to be done as it is for aarch64_sve_ext.
https://github.com/llvm/llvm-project/pull/115340
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