================ @@ -95,6 +99,144 @@ static void initializeAlloca(CodeGenFunction &CGF, AllocaInst *AI, Value *Size, I->addAnnotationMetadata("auto-init"); } +static Value *handleHlslSplitdouble(const CallExpr *E, CodeGenFunction *CGF) { + Value *Op0 = CGF->EmitScalarExpr(E->getArg(0)); + const auto *OutArg1 = dyn_cast<HLSLOutArgExpr>(E->getArg(1)); + const auto *OutArg2 = dyn_cast<HLSLOutArgExpr>(E->getArg(2)); + + CallArgList Args; + LValue Op1TmpLValue = + CGF->EmitHLSLOutArgExpr(OutArg1, Args, OutArg1->getType()); + LValue Op2TmpLValue = + CGF->EmitHLSLOutArgExpr(OutArg2, Args, OutArg2->getType()); + + if (CGF->getTarget().getCXXABI().areArgsDestroyedLeftToRightInCallee()) + Args.reverseWritebacks(); + + auto EmitVectorCode = + [](Value *Op, CGBuilderTy *Builder, + FixedVectorType *DestTy) -> std::pair<Value *, Value *> { + Value *bitcast = Builder->CreateBitCast(Op, DestTy); + + SmallVector<int> LowbitsIndex; + SmallVector<int> HighbitsIndex; + + for (unsigned int Idx = 0; Idx < DestTy->getNumElements(); Idx += 2) { + LowbitsIndex.push_back(Idx); + HighbitsIndex.push_back(Idx + 1); + } + + Value *Arg0 = Builder->CreateShuffleVector(bitcast, LowbitsIndex); + Value *Arg1 = Builder->CreateShuffleVector(bitcast, HighbitsIndex); + + return std::make_pair(Arg0, Arg1); + }; + + Value *LowBits = nullptr; + Value *HighBits = nullptr; + + if (CGF->CGM.getTarget().getTriple().isDXIL()) { + + llvm::Type *RetElementTy = CGF->Int32Ty; + if (auto *Op0VecTy = E->getArg(0)->getType()->getAs<clang::VectorType>()) + RetElementTy = llvm::VectorType::get( + CGF->Int32Ty, ElementCount::getFixed(Op0VecTy->getNumElements())); + auto *RetTy = llvm::StructType::get(RetElementTy, RetElementTy); + + CallInst *CI = CGF->Builder.CreateIntrinsic( + RetTy, Intrinsic::dx_splitdouble, {Op0}, nullptr, "hlsl.splitdouble"); + + LowBits = CGF->Builder.CreateExtractValue(CI, 0); + HighBits = CGF->Builder.CreateExtractValue(CI, 1); + + } else { + // For Non DXIL targets we generate the instructions. + // TODO: This code accounts for known limitations in + // SPIR-V and splitdouble. Such should be handled, + // in a later compilation stage. After [issue link here] + // is fixed, this shall be refactored. + + if (!Op0->getType()->isVectorTy()) { + FixedVectorType *DestTy = FixedVectorType::get(CGF->Int32Ty, 2); + Value *Bitcast = CGF->Builder.CreateBitCast(Op0, DestTy); + + LowBits = CGF->Builder.CreateExtractElement(Bitcast, 0.0); + HighBits = CGF->Builder.CreateExtractElement(Bitcast, 1.0); + } else { + + const auto *TargTy = E->getArg(0)->getType()->getAs<clang::VectorType>(); + + int NumElements = TargTy->getNumElements(); + + FixedVectorType *DestTy = FixedVectorType::get(CGF->Int32Ty, 4); + + if (NumElements == 1) { + FixedVectorType *DestTy = FixedVectorType::get(CGF->Int32Ty, 2); + auto *Bitcast = CGF->Builder.CreateBitCast(Op0, DestTy); + + LowBits = CGF->Builder.CreateExtractElement(Bitcast, 0.0); + HighBits = CGF->Builder.CreateExtractElement(Bitcast, 1.0); + } else if (NumElements == 2) { + auto [LB, HB] = EmitVectorCode(Op0, &CGF->Builder, DestTy); + LowBits = LB; + HighBits = HB; + } else { + + SmallVector<std::pair<Value *, Value *>> EmitedValuePairs; + + int isOdd = NumElements % 2; + int NumEvenElements = NumElements - isOdd; ---------------- farzonl wrote:
IsOdd would make mae think the type should be a bool. If you want to keep the int type I Would change the name to `OddBit` so you can do this subtraction. if you want to keep the `isOdd` name then change this to a terinary ```suggestion int NumEvenElements = isOdd ? NumElements - 1 : NumElements ; ``` https://github.com/llvm/llvm-project/pull/109331 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits