================
@@ -1647,3 +1647,23 @@ let isCodeGenOnly = 1, ForceDisassemble = 1,
hasSideEffects = 0 in
def : InstAlias<"vmovw.s\t{$src, $dst|$dst, $src}",
(VMOVZPWILo2PWIZrr2 VR128X:$dst, VR128X:$src), 0>;
}
+
+// SM4(EVEX)
+multiclass avx10_sm4_base<string OpStr> {
+ // SM4_Base is in X86InstrSSE.td.
+ let Predicates = [HasSM4, HasAVX10_2] in {
+ defm Z128 : SM4_Base<OpStr, avx512vl_i32_info.info128.RC,
+ "128", avx512vl_i32_info.info128.LdFrag,
----------------
phoebewang wrote:
`avx512vl_i32_info.info128.RC` -> `VR128X`
`vx512vl_i32_info.info128.LdFrag` -> `loadv4i32`
`avx512vl_i32_info.info128.MemOp` -> `i128mem`
https://github.com/llvm/llvm-project/pull/113402
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