yonghong-song wrote:
> > In the above, you will do unsigned load extension. But what about signed
> > extension load variant?
>
> @yonghong-song, if we ever need that, we can add a new flag to bit `0-3` of
> `imm` to indicate "this 8- or 16-bit load-acquire is sign-extending", just
> like `BPF_FETCH` for `BPF_XCHG` and `BPF_CMPXCHG`.
I think it is a reasonable idea to use 'imm' bit to indicate the atomic load
variants (load_acquire + sign/unsigned).
You could use patterns for atomic_load_zext_{8,16} and atomic_load_sext_{8,16}
instread of atomic_load_az_{8,16}.
This will make semantics much more clear. For example, atomic_load_az_8 means
"Atomic load which zeroes or anyextends the high bits", what we really wants is
zero extension.
https://github.com/llvm/llvm-project/pull/108636
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