================
@@ -5553,6 +5553,14 @@ static SDValue getSVEPredicateBitCast(EVT VT, SDValue
Op, SelectionDAG &DAG) {
if (InVT == VT)
return Op;
+ // Look through casts to <n x 16 x i1> when their input has more lanes than
+ // VT. This will increase the chances of removing casts that introduce new
+ // lanes, which have to be explicitly zero'd.
+ if (Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
+ Op.getConstantOperandVal(0) == Intrinsic::aarch64_sve_convert_to_svbool
&&
----------------
paulwalker-arm wrote:
No. At the IR level the conversion is a two step process because you have to
cast through the "svbool" type. i.e. There is no intrinsic that will convert
`<vscale x 8 x i1>` to `<vscale x 4 x i1>`.
https://github.com/llvm/llvm-project/pull/110281
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