================
@@ -828,101 +831,85 @@ static void
updateResourceClassFlagsFromRecordType(RegisterBindingFlags &Flags,
const Type *FieldTy = FD->getType().getTypePtr();
if (const HLSLAttributedResourceType *AttrResType =
dyn_cast<HLSLAttributedResourceType>(FieldTy)) {
- updateResourceClassFlagsFromDeclResourceClass(
- Flags, AttrResType->getAttrs().ResourceClass);
+ llvm::dxil::ResourceClass RC = AttrResType->getAttrs().ResourceClass;
+ if (getRegisterType(RC) == RegType)
+ return true;
continue;
}
TypesToScan.emplace_back(FD->getType().getTypePtr());
}
}
+ return false;
}
-static RegisterBindingFlags HLSLFillRegisterBindingFlags(Sema &S,
- Decl *TheDecl) {
- RegisterBindingFlags Flags;
+static void CheckContainsResourceForRegisterType(Sema &S,
+ SourceLocation &ArgLoc,
+ Decl *D,
+ RegisterType RegType) {
+ int RegTypeNum = static_cast<int>(RegType);
// check if the decl type is groupshared
- if (TheDecl->hasAttr<HLSLGroupSharedAddressSpaceAttr>()) {
- Flags.Other = true;
- return Flags;
+ if (D->hasAttr<HLSLGroupSharedAddressSpaceAttr>()) {
+ S.Diag(ArgLoc, diag::err_hlsl_binding_type_mismatch) << RegTypeNum;
+ return;
}
// Cbuffers and Tbuffers are HLSLBufferDecl types
- if (HLSLBufferDecl *CBufferOrTBuffer = dyn_cast<HLSLBufferDecl>(TheDecl)) {
- Flags.Resource = true;
- Flags.ResourceClass = CBufferOrTBuffer->isCBuffer()
- ? llvm::dxil::ResourceClass::CBuffer
- : llvm::dxil::ResourceClass::SRV;
+ if (HLSLBufferDecl *CBufferOrTBuffer = dyn_cast<HLSLBufferDecl>(D)) {
+ llvm::dxil::ResourceClass RC = CBufferOrTBuffer->isCBuffer()
+ ? llvm::dxil::ResourceClass::CBuffer
+ : llvm::dxil::ResourceClass::SRV;
+ if (RegType != getRegisterType(RC))
+ S.Diag(D->getLocation(), diag::err_hlsl_binding_type_mismatch)
+ << RegTypeNum;
+ return;
}
// Samplers, UAVs, and SRVs are VarDecl types
- else if (VarDecl *TheVarDecl = dyn_cast<VarDecl>(TheDecl)) {
+ if (VarDecl *TheVarDecl = dyn_cast<VarDecl>(D)) {
----------------
llvm-beanz wrote:
nit: Rather than an unreachable at the end of this block, we could eliminate
this block and have this be a `cast` with an `assert(isa<VarDecl>(D)...)`
above. That reduces the control flow nesting.
https://github.com/llvm/llvm-project/pull/108924
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