================ @@ -38197,7 +38197,8 @@ static bool matchUnaryShuffle(MVT MaskVT, ArrayRef<int> Mask, // Match against a VZEXT_MOVL instruction, SSE1 only supports 32-bits (MOVSS). if (((MaskEltSize == 32) || (MaskEltSize == 64 && Subtarget.hasSSE2()) || - (MaskEltSize == 16 && Subtarget.hasFP16())) && + (MaskEltSize == 16 && + (Subtarget.hasFP16() || Subtarget.hasAVX10_2()))) && ---------------- phoebewang wrote:
This is not necessary. AVX10.2 implies FP16. https://github.com/llvm/llvm-project/pull/108537 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits