================ @@ -380,6 +383,20 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg, MIB.addImm(V); return MIB.constrainAllUses(TII, TRI, RBI); } + + case TargetOpcode::G_FDOTPROD: { + MachineBasicBlock &BB = *I.getParent(); + return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpDot)) + .addDef(ResVReg) + .addUse(GR.getSPIRVTypeID(ResType)) + .addUse(I.getOperand(1).getReg()) + .addUse(I.getOperand(2).getReg()) + .constrainAllUses(TII, TRI, RBI); + } ---------------- pow2clk wrote:
There is a similar implementation here: https://github.com/llvm/llvm-project/blob/a0241e710fcae9f439e57d3a294b1ace97c6906c/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp#L1524 , but I'm not sure if they are mergeable and this is what was discussed. https://github.com/llvm/llvm-project/pull/102872 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits