github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 6867324eeec7c4f297c2f787d9c7b4d751a384c7
a11ed8bf7722f8a6d7e77e5d331692c78897fb48 --extensions inc,c,cpp,h --
clang/lib/Headers/avx10_2_512convertintrin.h
clang/lib/Headers/avx10_2_512niintrin.h
clang/lib/Headers/avx10_2convertintrin.h clang/lib/Headers/avx10_2niintrin.h
clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
clang/test/CodeGen/X86/avx10_2convert-builtins.c
clang/test/CodeGen/X86/avx10_2ni-builtins.c clang/lib/Basic/Targets/X86.cpp
clang/lib/Basic/Targets/X86.h clang/lib/Driver/ToolChains/Arch/X86.cpp
clang/lib/Headers/immintrin.h clang/lib/Sema/SemaX86.cpp
clang/test/CodeGen/attr-target-x86.c clang/test/Driver/x86-target-features.c
clang/test/Preprocessor/x86_target_features.c
llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86IntrinsicsInfo.h llvm/lib/TargetParser/Host.cpp
llvm/lib/TargetParser/X86TargetParser.cpp
llvm/test/TableGen/x86-fold-tables.inc
llvm/utils/TableGen/X86DisassemblerTables.cpp
llvm/utils/TableGen/X86RecognizableInstr.cpp
llvm/utils/TableGen/X86RecognizableInstr.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 2235d7018a..eae45b607c 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -389,54 +389,96 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx_vpermilvar_ps, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
X86_INTRINSIC_DATA(avx_vpermilvar_ps_256, INTR_TYPE_2OP, X86ISD::VPERMILPV,
0),
- X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_128, INTR_TYPE_2OP_MASK,
X86ISD::VCVT2PS2PHX, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_256, INTR_TYPE_2OP_MASK,
X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
- X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_512, INTR_TYPE_2OP_MASK,
X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8128, TRUNCATE_TO_REG2,
X86ISD::VCVTBIASPH2BF8, X86ISD::VMCVTBIASPH2BF8),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8256, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8512, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s128, TRUNCATE_TO_REG2,
X86ISD::VCVTBIASPH2BF8S, X86ISD::VMCVTBIASPH2BF8S),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s256, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s512, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8128, TRUNCATE_TO_REG2,
X86ISD::VCVTBIASPH2HF8, X86ISD::VMCVTBIASPH2HF8),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8256, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8512, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s128, TRUNCATE_TO_REG2,
X86ISD::VCVTBIASPH2HF8S, X86ISD::VMCVTBIASPH2HF8S),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s256, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s512, INTR_TYPE_2OP_MASK,
X86ISD::VCVTBIASPH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph128, INTR_TYPE_1OP_MASK,
X86ISD::VCVTHF82PH, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph256, INTR_TYPE_1OP_MASK,
X86ISD::VCVTHF82PH, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph512, INTR_TYPE_1OP_MASK,
X86ISD::VCVTHF82PH, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8128, TRUNCATE_TO_REG,
X86ISD::VCVTNEPH2BF8, X86ISD::VMCVTNEPH2BF8),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8256, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8512, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s128, TRUNCATE_TO_REG,
X86ISD::VCVTNEPH2BF8S, X86ISD::VMCVTNEPH2BF8S),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s256, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s512, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8128, TRUNCATE_TO_REG,
X86ISD::VCVTNEPH2HF8, X86ISD::VMCVTNEPH2HF8),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8256, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8512, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s128, TRUNCATE_TO_REG,
X86ISD::VCVTNEPH2HF8S, X86ISD::VMCVTNEPH2HF8S),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s256, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s512, INTR_TYPE_1OP_MASK,
X86ISD::VCVTNEPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_128, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8128, TRUNCATE_TO_REG2,
+ X86ISD::VCVTBIASPH2BF8, X86ISD::VMCVTBIASPH2BF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s128, TRUNCATE_TO_REG2,
+ X86ISD::VCVTBIASPH2BF8S, X86ISD::VMCVTBIASPH2BF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8128, TRUNCATE_TO_REG2,
+ X86ISD::VCVTBIASPH2HF8, X86ISD::VMCVTBIASPH2HF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s128, TRUNCATE_TO_REG2,
+ X86ISD::VCVTBIASPH2HF8S, X86ISD::VMCVTBIASPH2HF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2BF8, X86ISD::VMCVTNEPH2BF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2BF8S, X86ISD::VMCVTNEPH2BF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2HF8, X86ISD::VMCVTNEPH2HF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2HF8S, X86ISD::VMCVTNEPH2HF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8S, 0),
X86_INTRINSIC_DATA(avx10_vaddpd256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
X86_INTRINSIC_DATA(avx10_vaddph256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
X86_INTRINSIC_DATA(avx10_vaddps256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8128, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8256, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8512, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s128, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s256, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s512, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8128, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8256, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8512, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s128, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s256, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s512, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
X86_INTRINSIC_DATA(avx10_vmpsadbw_512, INTR_TYPE_3OP_IMM8, X86ISD::MPSADBW,
0),
X86_INTRINSIC_DATA(avx2_mpsadbw, INTR_TYPE_3OP_IMM8, X86ISD::MPSADBW, 0),
``````````
</details>
https://github.com/llvm/llvm-project/pull/101600
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