github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 247251aee0d4314385a3fea86e31484d3d792ffb
02af8355ccdfb41199168a2b71c1b25a491a6310 --extensions c,h,cpp --
clang/test/CodeGen/bpf-attr-bpf-fastcall-1.c
clang/test/Sema/bpf-attr-bpf-fastcall.c clang/lib/CodeGen/CGCall.cpp
llvm/lib/Target/BPF/BPFISelLowering.cpp llvm/lib/Target/BPF/BPFMIPeephole.cpp
llvm/lib/Target/BPF/BPFRegisterInfo.cpp llvm/lib/Target/BPF/BPFRegisterInfo.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp
b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index 3a72279976..ff23d3b055 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -403,7 +403,7 @@ SDValue BPFTargetLowering::LowerFormalArguments(
const size_t BPFTargetLowering::MaxArgs = 5;
static void resetRegMaskBit(const TargetRegisterInfo *TRI, uint32_t *RegMask,
- MCRegister Reg) {
+ MCRegister Reg) {
for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
RegMask[SubReg / 32] &= ~(1u << (SubReg % 32));
}
@@ -528,8 +528,8 @@ SDValue
BPFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
for (auto &Reg : RegsToPass)
Ops.push_back(DAG.getRegister(Reg.first, Reg.second.getValueType()));
- bool HasFastCall = (CLI.CB && isa<CallInst>(CLI.CB) &&
- CLI.CB->hasFnAttr("bpf_fastcall"));
+ bool HasFastCall =
+ (CLI.CB && isa<CallInst>(CLI.CB) && CLI.CB->hasFnAttr("bpf_fastcall"));
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
if (HasFastCall) {
uint32_t *RegMask = regMaskFromTemplate(
diff --git a/llvm/lib/Target/BPF/BPFMIPeephole.cpp
b/llvm/lib/Target/BPF/BPFMIPeephole.cpp
index 5ee0893946..5ada86a8bf 100644
--- a/llvm/lib/Target/BPF/BPFMIPeephole.cpp
+++ b/llvm/lib/Target/BPF/BPFMIPeephole.cpp
@@ -25,10 +25,10 @@
#include "BPFTargetMachine.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Support/Debug.h"
#include <set>
@@ -600,8 +600,8 @@ bool BPFMIPreEmitPeephole::adjustBranch() {
return Changed;
}
-static const unsigned CallerSavedRegs[] =
- {BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5};
+static const unsigned CallerSavedRegs[] = {BPF::R0, BPF::R1, BPF::R2,
+ BPF::R3, BPF::R4, BPF::R5};
struct BPFFastCall {
MachineInstr *MI;
@@ -609,31 +609,31 @@ struct BPFFastCall {
};
static void collectBPFFastCalls(const TargetRegisterInfo *TRI,
- LivePhysRegs &LiveRegs,
- MachineBasicBlock &BB,
+ LivePhysRegs &LiveRegs, MachineBasicBlock &BB,
SmallVectorImpl<BPFFastCall> &Calls) {
- LiveRegs.init(*TRI);
- LiveRegs.addLiveOuts(BB);
- Calls.clear();
- for (MachineInstr &MI: llvm::reverse(BB)) {
- unsigned LiveCallerSavedRegs;
- if (!MI.isCall())
- goto NextInsn;
- LiveCallerSavedRegs = 0;
- for (MCRegister R: CallerSavedRegs) {
- bool DoSpillFill = !MI.definesRegister(R, TRI) && LiveRegs.contains(R);
- if (!DoSpillFill)
- continue;
- LiveCallerSavedRegs |= 1 << R;
- }
- if (LiveCallerSavedRegs)
- Calls.push_back({&MI, LiveCallerSavedRegs});
- NextInsn:
- LiveRegs.stepBackward(MI);
+ LiveRegs.init(*TRI);
+ LiveRegs.addLiveOuts(BB);
+ Calls.clear();
+ for (MachineInstr &MI : llvm::reverse(BB)) {
+ unsigned LiveCallerSavedRegs;
+ if (!MI.isCall())
+ goto NextInsn;
+ LiveCallerSavedRegs = 0;
+ for (MCRegister R : CallerSavedRegs) {
+ bool DoSpillFill = !MI.definesRegister(R, TRI) && LiveRegs.contains(R);
+ if (!DoSpillFill)
+ continue;
+ LiveCallerSavedRegs |= 1 << R;
}
+ if (LiveCallerSavedRegs)
+ Calls.push_back({&MI, LiveCallerSavedRegs});
+ NextInsn:
+ LiveRegs.stepBackward(MI);
+ }
}
-static int64_t computeMinFixedObjOffset(MachineFrameInfo &MFI, unsigned
SlotSize) {
+static int64_t computeMinFixedObjOffset(MachineFrameInfo &MFI,
+ unsigned SlotSize) {
int64_t MinFixedObjOffset = 0;
// Same logic as in X86FrameLowering::adjustFrameForMsvcCxxEh()
for (int I = MFI.getObjectIndexBegin(); I < MFI.getObjectIndexEnd(); ++I) {
@@ -641,7 +641,8 @@ static int64_t computeMinFixedObjOffset(MachineFrameInfo
&MFI, unsigned SlotSize
continue;
MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
}
- MinFixedObjOffset -= (SlotSize + MinFixedObjOffset % SlotSize) & (SlotSize -
1);
+ MinFixedObjOffset -=
+ (SlotSize + MinFixedObjOffset % SlotSize) & (SlotSize - 1);
return MinFixedObjOffset;
}
@@ -652,29 +653,31 @@ bool
BPFMIPreEmitPeephole::insertMissingCallerSavedSpills() {
const unsigned SlotSize = 8;
int64_t MinFixedObjOffset = computeMinFixedObjOffset(MFI, SlotSize);
bool Changed = false;
- for (MachineBasicBlock &BB: *MF) {
+ for (MachineBasicBlock &BB : *MF) {
collectBPFFastCalls(TRI, LiveRegs, BB, Calls);
Changed |= !Calls.empty();
- for (BPFFastCall &Call: Calls) {
+ for (BPFFastCall &Call : Calls) {
int64_t CurOffset = MinFixedObjOffset;
- for (MCRegister Reg: CallerSavedRegs) {
+ for (MCRegister Reg : CallerSavedRegs) {
if (((1 << Reg) & Call.LiveCallerSavedRegs) == 0)
continue;
// Allocate stack object
CurOffset -= SlotSize;
MFI.CreateFixedSpillStackObject(SlotSize, CurOffset);
// Generate spill
- BuildMI(BB, Call.MI->getIterator(), Call.MI->getDebugLoc(),
TII->get(BPF::STD))
- .addReg(Reg)
- .addReg(BPF::R10)
- .addImm(CurOffset)
- .addImm(0);
+ BuildMI(BB, Call.MI->getIterator(), Call.MI->getDebugLoc(),
+ TII->get(BPF::STD))
+ .addReg(Reg)
+ .addReg(BPF::R10)
+ .addImm(CurOffset)
+ .addImm(0);
// Generate fill
- BuildMI(BB, ++Call.MI->getIterator(), Call.MI->getDebugLoc(),
TII->get(BPF::LDD))
- .addReg(Reg)
- .addReg(BPF::R10)
- .addImm(CurOffset)
- .addImm(0);
+ BuildMI(BB, ++Call.MI->getIterator(), Call.MI->getDebugLoc(),
+ TII->get(BPF::LDD))
+ .addReg(Reg)
+ .addReg(BPF::R10)
+ .addImm(CurOffset)
+ .addImm(0);
}
}
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/101228
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