[clang] [llvm] [WIP][RISCV] Support __builtin_cpu_init and __builtin_cpu_supports (PR #99700)

[Philip Reames via cfe-commits]

================
@@ -1020,3 +1020,64 @@ std::string 
RISCVISAInfo::getTargetFeatureForExtension(StringRef Ext) {
   return isExperimentalExtension(Name) ? "experimental-" + Name.str()
                                        : Name.str();
 }
+
+struct RISCVExtBit {
+  const StringRef ext;
+  uint64_t bitpos;
+};
+
+/// Maps extensions with assigned bit positions within group 0 of
+/// __riscv_features_bits to their respective bit position.  At the
+/// moment all extensions are within group 0.
+static RISCVExtBit RISCVGroup0BitPositions[] = {
----------------
preames wrote:

IMO, adding the additional information to RISCVFeatures.td just complicates 
things.  

https://github.com/llvm/llvm-project/pull/99700
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits