================ @@ -3267,10 +3267,13 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters( InsertSEH(MIB, TII, MachineInstr::FrameSetup); } else { // The code when the pair of ZReg is not present MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc)); - if (!MRI.isReserved(Reg1)) + const AArch64RegisterInfo *RegInfo = + static_cast<const AArch64RegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); + if (!RegInfo->isStrictlyReservedReg(MF, Reg1)) ---------------- efriedma-quic wrote:
We could unreserve LR after register allocation, I guess? That would have roughly the right semantics. Or we could make the outliner use some other method to try to figure out the "liveness" of LR if it's a reserved register. I mean, if LR is reserved, the only way it can be live is if the prologue doesn't save/restore it (in which case it's live across the whole function). https://github.com/llvm/llvm-project/pull/98073 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits