ahatanak added a comment.
I guess it doesn't build because output constraints need "=" (e.g., "=D")?
Also, I think all registers ("D", "S", and "c") should be in both the output
and input operands list. You can probably declare new variables and use them in
the output operands (e.g., "=D"(newDst)) or use input/output operands "+" (the
former is simpler in this case, since you want to use the original values of
dst and src).
Repository:
rL LLVM
https://reviews.llvm.org/D15075
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