https://github.com/weiweichen updated
https://github.com/llvm/llvm-project/pull/96832
>From 37e0ff835b7ade8def6e141ae7a55d55380f887e Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.c...@modular.com>
Date: Wed, 26 Jun 2024 19:28:58 -0400
Subject: [PATCH 1/2] Bring initFeatureMap back to AArch64TargetInfo.
---
clang/lib/Basic/Targets/AArch64.cpp | 18 ++++++++++++++++++
clang/lib/Basic/Targets/AArch64.h | 5 +++++
2 files changed, 23 insertions(+)
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index 2692ddec26ff4..efc5c7e6e931a 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1170,6 +1170,24 @@ ParsedTargetAttr
AArch64TargetInfo::parseTargetAttr(StringRef Features) const {
return Ret;
}
+bool AArch64TargetInfo::initFeatureMap(
+ llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
+ const std::vector<std::string> &FeaturesVec) const {
+ std::vector<std::string> UpdatedFeaturesVec;
+ // Parse the CPU and add any implied features.
+ std::optional<llvm::AArch64::CpuInfo> CpuInfo =
llvm::AArch64::parseCpu(CPU);
+ if (CpuInfo) {
+ auto Exts = CpuInfo->getImpliedExtensions();
+ std::vector<StringRef> CPUFeats;
+ llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
+ for (auto F : CPUFeats) {
+ assert((F[0] == '+' || F[0] == '-') && "Expected +/- in target
feature!");
+ UpdatedFeaturesVec.push_back(F.str());
+ }
+ }
+ return TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec);
+}
+
bool AArch64TargetInfo::hasBFloat16Type() const {
return true;
}
diff --git a/clang/lib/Basic/Targets/AArch64.h
b/clang/lib/Basic/Targets/AArch64.h
index 71510fe289510..1af80db0de05c 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -107,6 +107,11 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public
TargetInfo {
unsigned multiVersionSortPriority(StringRef Name) const override;
unsigned multiVersionFeatureCost() const override;
+ bool
+ initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
+ StringRef CPU,
+ const std::vector<std::string> &FeaturesVec) const override;
+
bool useFP16ConversionIntrinsics() const override {
return false;
}
>From 6f266f123245f839c6614243d26903ae1bcb0a52 Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.c...@modular.com>
Date: Wed, 26 Jun 2024 19:33:25 -0400
Subject: [PATCH 2/2] format.
---
clang/lib/Basic/Targets/AArch64.cpp | 59 ++++++++++++++---------------
clang/lib/Basic/Targets/AArch64.h | 19 +++++-----
2 files changed, 38 insertions(+), 40 deletions(-)
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index efc5c7e6e931a..8c4d1bbb171b1 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -143,7 +143,8 @@ AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple
&Triple,
IntMaxType = SignedLong;
}
- // All AArch64 implementations support ARMv8 FP, which makes half a legal
type.
+ // All AArch64 implementations support ARMv8 FP, which makes half a legal
+ // type.
HasLegalHalfType = true;
HalfArgsAndReturns = true;
HasFloat16 = true;
@@ -370,8 +371,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions
&Opts,
MacroBuilder &Builder) const {
// Target identification.
if (getTriple().isWindowsArm64EC()) {
- // Define the same set of macros as would be defined on x86_64 to ensure
that
- // ARM64EC datatype layouts match those of x86_64 compiled code
+ // Define the same set of macros as would be defined on x86_64 to ensure
+ // that ARM64EC datatype layouts match those of x86_64 compiled code
Builder.defineMacro("__amd64__");
Builder.defineMacro("__amd64");
Builder.defineMacro("__x86_64");
@@ -519,7 +520,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions
&Opts,
if ((FPU & NeonMode) && HasFullFP16)
Builder.defineMacro("__ARM_FEATURE_FP16_VECTOR_ARITHMETIC", "1");
if (HasFullFP16)
- Builder.defineMacro("__ARM_FEATURE_FP16_SCALAR_ARITHMETIC", "1");
+ Builder.defineMacro("__ARM_FEATURE_FP16_SCALAR_ARITHMETIC", "1");
if (HasDotProd)
Builder.defineMacro("__ARM_FEATURE_DOTPROD", "1");
@@ -1171,27 +1172,25 @@ ParsedTargetAttr
AArch64TargetInfo::parseTargetAttr(StringRef Features) const {
}
bool AArch64TargetInfo::initFeatureMap(
- llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
- const std::vector<std::string> &FeaturesVec) const {
- std::vector<std::string> UpdatedFeaturesVec;
- // Parse the CPU and add any implied features.
- std::optional<llvm::AArch64::CpuInfo> CpuInfo =
llvm::AArch64::parseCpu(CPU);
- if (CpuInfo) {
- auto Exts = CpuInfo->getImpliedExtensions();
- std::vector<StringRef> CPUFeats;
- llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
- for (auto F : CPUFeats) {
- assert((F[0] == '+' || F[0] == '-') && "Expected +/- in target
feature!");
- UpdatedFeaturesVec.push_back(F.str());
- }
- }
- return TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec);
-}
-
-bool AArch64TargetInfo::hasBFloat16Type() const {
- return true;
+ llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
+ const std::vector<std::string> &FeaturesVec) const {
+ std::vector<std::string> UpdatedFeaturesVec;
+ // Parse the CPU and add any implied features.
+ std::optional<llvm::AArch64::CpuInfo> CpuInfo = llvm::AArch64::parseCpu(CPU);
+ if (CpuInfo) {
+ auto Exts = CpuInfo->getImpliedExtensions();
+ std::vector<StringRef> CPUFeats;
+ llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
+ for (auto F : CPUFeats) {
+ assert((F[0] == '+' || F[0] == '-') && "Expected +/- in target
feature!");
+ UpdatedFeaturesVec.push_back(F.str());
+ }
+ }
+ return TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec);
}
+bool AArch64TargetInfo::hasBFloat16Type() const { return true; }
+
TargetInfo::CallingConvCheckResult
AArch64TargetInfo::checkCallingConvention(CallingConv CC) const {
switch (CC) {
@@ -1478,7 +1477,7 @@ AArch64leTargetInfo::AArch64leTargetInfo(const
llvm::Triple &Triple,
void AArch64leTargetInfo::setDataLayout() {
if (getTriple().isOSBinFormatMachO()) {
- if(getTriple().isArch32Bit())
+ if (getTriple().isArch32Bit())
resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32", "_");
else
resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128-Fn32", "_");
@@ -1596,12 +1595,12 @@ unsigned
MicrosoftARM64TargetInfo::getMinGlobalAlign(uint64_t TypeSize,
// below document, replicate that to keep alignment consistent with object
// files compiled by MSVC.
// https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions
- if (TypeSize >= 512) { // TypeSize >= 64 bytes
- Align = std::max(Align, 128u); // align type at least 16 bytes
- } else if (TypeSize >= 64) { // TypeSize >= 8 bytes
- Align = std::max(Align, 64u); // align type at least 8 butes
- } else if (TypeSize >= 16) { // TypeSize >= 2 bytes
- Align = std::max(Align, 32u); // align type at least 4 bytes
+ if (TypeSize >= 512) { // TypeSize >= 64 bytes
+ Align = std::max(Align, 128u); // align type at least 16 bytes
+ } else if (TypeSize >= 64) { // TypeSize >= 8 bytes
+ Align = std::max(Align, 64u); // align type at least 8 butes
+ } else if (TypeSize >= 16) { // TypeSize >= 2 bytes
+ Align = std::max(Align, 32u); // align type at least 4 bytes
}
return Align;
}
diff --git a/clang/lib/Basic/Targets/AArch64.h
b/clang/lib/Basic/Targets/AArch64.h
index 1af80db0de05c..cc4b52e872f4b 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -109,12 +109,10 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public
TargetInfo {
bool
initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
- StringRef CPU,
- const std::vector<std::string> &FeaturesVec) const override;
+ StringRef CPU,
+ const std::vector<std::string> &FeaturesVec) const override;
- bool useFP16ConversionIntrinsics() const override {
- return false;
- }
+ bool useFP16ConversionIntrinsics() const override { return false; }
void setArchFeatures();
@@ -212,7 +210,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public
AArch64TargetInfo {
AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override;
+ MacroBuilder &Builder) const override;
+
private:
void setDataLayout() override;
};
@@ -222,8 +221,7 @@ class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo
const llvm::Triple Triple;
public:
- WindowsARM64TargetInfo(const llvm::Triple &Triple,
- const TargetOptions &Opts);
+ WindowsARM64TargetInfo(const llvm::Triple &Triple, const TargetOptions
&Opts);
void setDataLayout() override;
@@ -268,11 +266,12 @@ class LLVM_LIBRARY_VISIBILITY AArch64beTargetInfo :
public AArch64TargetInfo {
class LLVM_LIBRARY_VISIBILITY DarwinAArch64TargetInfo
: public DarwinTargetInfo<AArch64leTargetInfo> {
public:
- DarwinAArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions
&Opts);
+ DarwinAArch64TargetInfo(const llvm::Triple &Triple,
+ const TargetOptions &Opts);
BuiltinVaListKind getBuiltinVaListKind() const override;
- protected:
+protected:
void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
MacroBuilder &Builder) const override;
};
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