androm3da wrote: I was mistaken: it appears that the cache line size is not the same among all CPUs. I'll revise this PR.
Since I'm away from the office for a couple of weeks, I've switched this PR to a draft. I'll revisit it when I return and promote it when updated. https://github.com/llvm/llvm-project/pull/94877 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
