[clang] [llvm] [AArch64] Add support for Cortex-A725 and Cortex-X925 (PR #95214)

[David Green via cfe-commits]

================
@@ -723,6 +746,9 @@ def ProcessorFeatures {
                                  FeaturePerfMon, FeatureETE, FeatureTRBE,
                                  FeatureSPE, FeatureMTE, FeatureSVE2BitPerm,
                                  FeatureFP16FML, FeatureSPE_EEF];
+  list<SubtargetFeature> X925 = [HasV9_2aOps, FeatureMTE, FeatureFP16FML,
----------------
davemgreen wrote:

Should this include FeatureSVE2BitPerm? It is included in the AEK_ list, and X4 
the features.

Same for the A725 features.

https://github.com/llvm/llvm-project/pull/95214
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits