https://github.com/hvdijk updated
https://github.com/llvm/llvm-project/pull/94229
>From 895f71d5f890a3988014e0d779586b9f142be90f Mon Sep 17 00:00:00 2001
From: Harald van Dijk <harald.vand...@codeplay.com>
Date: Mon, 3 Jun 2024 15:03:17 +0100
Subject: [PATCH] [SYCL] Allow neon attributes for ARM host
We permit neon attributes in CUDA device code, but this permission was
only for CUDA device code. The same permission makes sense for SYCL
device code as well, especially now that neon attributes are used in
glibc headers.
---
clang/lib/Sema/SemaType.cpp | 12 ++++++------
clang/test/SemaSYCL/neon-attrs.cpp | 15 +++++++++++++++
2 files changed, 21 insertions(+), 6 deletions(-)
create mode 100644 clang/test/SemaSYCL/neon-attrs.cpp
diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp
index 7cec82c701028..a8a1463522d03 100644
--- a/clang/lib/Sema/SemaType.cpp
+++ b/clang/lib/Sema/SemaType.cpp
@@ -8077,10 +8077,10 @@ static bool verifyValidIntegerConstantExpr(Sema &S,
const ParsedAttr &Attr,
/// match one of the standard Neon vector types.
static void HandleNeonVectorTypeAttr(QualType &CurType, const ParsedAttr &Attr,
Sema &S, VectorKind VecKind) {
- bool IsTargetCUDAAndHostARM = false;
- if (S.getLangOpts().CUDAIsDevice) {
+ bool IsTargetDeviceAndHostARM = false;
+ if (S.getLangOpts().CUDAIsDevice || S.getLangOpts().SYCLIsDevice) {
const TargetInfo *AuxTI = S.getASTContext().getAuxTargetInfo();
- IsTargetCUDAAndHostARM =
+ IsTargetDeviceAndHostARM =
AuxTI && (AuxTI->getTriple().isAArch64() ||
AuxTI->getTriple().isARM());
}
@@ -8090,7 +8090,7 @@ static void HandleNeonVectorTypeAttr(QualType &CurType,
const ParsedAttr &Attr,
S.Context.getTargetInfo().hasFeature("mve") ||
S.Context.getTargetInfo().hasFeature("sve") ||
S.Context.getTargetInfo().hasFeature("sme") ||
- IsTargetCUDAAndHostARM) &&
+ IsTargetDeviceAndHostARM) &&
VecKind == VectorKind::Neon) {
S.Diag(Attr.getLoc(), diag::err_attribute_unsupported)
<< Attr << "'neon', 'mve', 'sve' or 'sme'";
@@ -8099,7 +8099,7 @@ static void HandleNeonVectorTypeAttr(QualType &CurType,
const ParsedAttr &Attr,
}
if (!(S.Context.getTargetInfo().hasFeature("neon") ||
S.Context.getTargetInfo().hasFeature("mve") ||
- IsTargetCUDAAndHostARM) &&
+ IsTargetDeviceAndHostARM) &&
VecKind == VectorKind::NeonPoly) {
S.Diag(Attr.getLoc(), diag::err_attribute_unsupported)
<< Attr << "'neon' or 'mve'";
@@ -8121,7 +8121,7 @@ static void HandleNeonVectorTypeAttr(QualType &CurType,
const ParsedAttr &Attr,
// Only certain element types are supported for Neon vectors.
if (!isPermittedNeonBaseType(CurType, VecKind, S) &&
- !IsTargetCUDAAndHostARM) {
+ !IsTargetDeviceAndHostARM) {
S.Diag(Attr.getLoc(), diag::err_attribute_invalid_vector_type) << CurType;
Attr.setInvalid();
return;
diff --git a/clang/test/SemaSYCL/neon-attrs.cpp
b/clang/test/SemaSYCL/neon-attrs.cpp
new file mode 100644
index 0000000000000..b1fd947d4a888
--- /dev/null
+++ b/clang/test/SemaSYCL/neon-attrs.cpp
@@ -0,0 +1,15 @@
+// Host compilation on ARM with neon enabled (no errors expected).
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon
-fsyntax-only -verify=quiet %s
+
+// Host compilation on ARM with neon disabled.
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature -neon
-fsyntax-only -verify %s
+
+// Device compilation on ARM (no errors expected).
+// RUN: %clang_cc1 -triple spirv64 -aux-triple aarch64-linux-gnu
-fsycl-is-device -fsyntax-only -verify=quiet %s
+
+// quiet-no-diagnostics
+typedef __attribute__((neon_vector_type(4))) float float32x4_t;
+// expected-error@-1 {{'neon_vector_type' attribute is not supported on
targets missing 'neon', 'mve', 'sve' or 'sme'}}
+typedef unsigned char poly8_t;
+typedef __attribute__((neon_polyvector_type(8))) poly8_t poly8x8_t;
+// expected-error@-1 {{'neon_polyvector_type' attribute is not supported on
targets missing 'neon' or 'mve'}}
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