llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-x86 Author: Vlad Serebrennikov (Endilll) <details> <summary>Changes</summary> This patch moves `Sema` functions that are specific for x86 into the new `SemaX86` class. This continues previous efforts to split `Sema` up. Additional context can be found in #<!-- -->84184 and #<!-- -->92682. --- Patch is 76.87 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93098.diff 6 Files Affected: - (modified) clang/include/clang/Sema/Sema.h (+7-10) - (added) clang/include/clang/Sema/SemaX86.h (+38) - (modified) clang/lib/Sema/CMakeLists.txt (+1) - (modified) clang/lib/Sema/Sema.cpp (+2) - (modified) clang/lib/Sema/SemaChecking.cpp (+2-851) - (added) clang/lib/Sema/SemaX86.cpp (+910) ``````````diff diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 97784f5ae0dc8..057ff61ccc644 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -177,6 +177,7 @@ class SemaOpenMP; class SemaPseudoObject; class SemaRISCV; class SemaSYCL; +class SemaX86; class StandardConversionSequence; class Stmt; class StringLiteral; @@ -1037,6 +1038,11 @@ class Sema final : public SemaBase { return *SYCLPtr; } + SemaX86 &X86() { + assert(X86Ptr); + return *X86Ptr; + } + /// Source of additional semantic information. IntrusiveRefCntPtr<ExternalSemaSource> ExternalSource; @@ -1076,6 +1082,7 @@ class Sema final : public SemaBase { std::unique_ptr<SemaPseudoObject> PseudoObjectPtr; std::unique_ptr<SemaRISCV> RISCVPtr; std::unique_ptr<SemaSYCL> SYCLPtr; + std::unique_ptr<SemaX86> X86Ptr; ///@} @@ -2122,16 +2129,6 @@ class Sema final : public SemaBase { CallExpr *TheCall); bool CheckMipsBuiltinArgument(unsigned BuiltinID, CallExpr *TheCall); bool CheckSystemZBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall); - bool CheckX86BuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall); - bool CheckX86BuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall); - bool CheckX86BuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall); - bool CheckX86BuiltinTileArgumentsRange(CallExpr *TheCall, - ArrayRef<int> ArgNums); - bool CheckX86BuiltinTileDuplicate(CallExpr *TheCall, ArrayRef<int> ArgNums); - bool CheckX86BuiltinTileRangeAndDuplicate(CallExpr *TheCall, - ArrayRef<int> ArgNums); - bool CheckX86BuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, - CallExpr *TheCall); bool CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall); bool CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall); diff --git a/clang/include/clang/Sema/SemaX86.h b/clang/include/clang/Sema/SemaX86.h new file mode 100644 index 0000000000000..e322483294ec7 --- /dev/null +++ b/clang/include/clang/Sema/SemaX86.h @@ -0,0 +1,38 @@ +//===----- SemaX86.h ------- X86 target-specific routines -----*- C++ -*---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file declares semantic analysis functions specific to X86. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_SEMA_SEMAX86_H +#define LLVM_CLANG_SEMA_SEMAX86_H + +#include "clang/AST/Expr.h" +#include "clang/Basic/LLVM.h" +#include "clang/Basic/TargetInfo.h" +#include "clang/Sema/SemaBase.h" + +namespace clang { +class SemaX86 : public SemaBase { +public: + SemaX86(Sema &S); + + bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall); + bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall); + bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall); + bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef<int> ArgNums); + bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef<int> ArgNums); + bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, + ArrayRef<int> ArgNums); + bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, + CallExpr *TheCall); +}; +} // namespace clang + +#endif // LLVM_CLANG_SEMA_SEMAX86_H diff --git a/clang/lib/Sema/CMakeLists.txt b/clang/lib/Sema/CMakeLists.txt index 6b7742cae2db9..fe6471c81ff01 100644 --- a/clang/lib/Sema/CMakeLists.txt +++ b/clang/lib/Sema/CMakeLists.txt @@ -71,6 +71,7 @@ add_clang_library(clangSema SemaTemplateInstantiateDecl.cpp SemaTemplateVariadic.cpp SemaType.cpp + SemaX86.cpp TypeLocBuilder.cpp DEPENDS diff --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp index f6317f10b1848..d1fb21bb1ae1d 100644 --- a/clang/lib/Sema/Sema.cpp +++ b/clang/lib/Sema/Sema.cpp @@ -52,6 +52,7 @@ #include "clang/Sema/SemaPseudoObject.h" #include "clang/Sema/SemaRISCV.h" #include "clang/Sema/SemaSYCL.h" +#include "clang/Sema/SemaX86.h" #include "clang/Sema/TemplateDeduction.h" #include "clang/Sema/TemplateInstCallback.h" #include "clang/Sema/TypoCorrection.h" @@ -215,6 +216,7 @@ Sema::Sema(Preprocessor &pp, ASTContext &ctxt, ASTConsumer &consumer, PseudoObjectPtr(std::make_unique<SemaPseudoObject>(*this)), RISCVPtr(std::make_unique<SemaRISCV>(*this)), SYCLPtr(std::make_unique<SemaSYCL>(*this)), + X86Ptr(std::make_unique<SemaX86>(*this)), MSPointerToMemberRepresentationMethod( LangOpts.getMSPointerToMemberRepresentationMethod()), MSStructPragmaOn(false), VtorDispStack(LangOpts.getVtorDispMode()), diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 8c08bf7510c85..dd48490e6dd42 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -64,6 +64,7 @@ #include "clang/Sema/SemaInternal.h" #include "clang/Sema/SemaObjC.h" #include "clang/Sema/SemaRISCV.h" +#include "clang/Sema/SemaX86.h" #include "llvm/ADT/APFloat.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/APSInt.h" @@ -2277,7 +2278,7 @@ bool Sema::CheckTSBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, return CheckSystemZBuiltinFunctionCall(BuiltinID, TheCall); case llvm::Triple::x86: case llvm::Triple::x86_64: - return CheckX86BuiltinFunctionCall(TI, BuiltinID, TheCall); + return X86().CheckBuiltinFunctionCall(TI, BuiltinID, TheCall); case llvm::Triple::ppc: case llvm::Triple::ppcle: case llvm::Triple::ppc64: @@ -5863,856 +5864,6 @@ bool Sema::CheckNVPTXBuiltinFunctionCall(const TargetInfo &TI, return false; } -// Check if the rounding mode is legal. -bool Sema::CheckX86BuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) { - // Indicates if this instruction has rounding control or just SAE. - bool HasRC = false; - - unsigned ArgNum = 0; - switch (BuiltinID) { - default: - return false; - case X86::BI__builtin_ia32_vcvttsd2si32: - case X86::BI__builtin_ia32_vcvttsd2si64: - case X86::BI__builtin_ia32_vcvttsd2usi32: - case X86::BI__builtin_ia32_vcvttsd2usi64: - case X86::BI__builtin_ia32_vcvttss2si32: - case X86::BI__builtin_ia32_vcvttss2si64: - case X86::BI__builtin_ia32_vcvttss2usi32: - case X86::BI__builtin_ia32_vcvttss2usi64: - case X86::BI__builtin_ia32_vcvttsh2si32: - case X86::BI__builtin_ia32_vcvttsh2si64: - case X86::BI__builtin_ia32_vcvttsh2usi32: - case X86::BI__builtin_ia32_vcvttsh2usi64: - ArgNum = 1; - break; - case X86::BI__builtin_ia32_maxpd512: - case X86::BI__builtin_ia32_maxps512: - case X86::BI__builtin_ia32_minpd512: - case X86::BI__builtin_ia32_minps512: - case X86::BI__builtin_ia32_maxph512: - case X86::BI__builtin_ia32_minph512: - ArgNum = 2; - break; - case X86::BI__builtin_ia32_vcvtph2pd512_mask: - case X86::BI__builtin_ia32_vcvtph2psx512_mask: - case X86::BI__builtin_ia32_cvtps2pd512_mask: - case X86::BI__builtin_ia32_cvttpd2dq512_mask: - case X86::BI__builtin_ia32_cvttpd2qq512_mask: - case X86::BI__builtin_ia32_cvttpd2udq512_mask: - case X86::BI__builtin_ia32_cvttpd2uqq512_mask: - case X86::BI__builtin_ia32_cvttps2dq512_mask: - case X86::BI__builtin_ia32_cvttps2qq512_mask: - case X86::BI__builtin_ia32_cvttps2udq512_mask: - case X86::BI__builtin_ia32_cvttps2uqq512_mask: - case X86::BI__builtin_ia32_vcvttph2w512_mask: - case X86::BI__builtin_ia32_vcvttph2uw512_mask: - case X86::BI__builtin_ia32_vcvttph2dq512_mask: - case X86::BI__builtin_ia32_vcvttph2udq512_mask: - case X86::BI__builtin_ia32_vcvttph2qq512_mask: - case X86::BI__builtin_ia32_vcvttph2uqq512_mask: - case X86::BI__builtin_ia32_exp2pd_mask: - case X86::BI__builtin_ia32_exp2ps_mask: - case X86::BI__builtin_ia32_getexppd512_mask: - case X86::BI__builtin_ia32_getexpps512_mask: - case X86::BI__builtin_ia32_getexpph512_mask: - case X86::BI__builtin_ia32_rcp28pd_mask: - case X86::BI__builtin_ia32_rcp28ps_mask: - case X86::BI__builtin_ia32_rsqrt28pd_mask: - case X86::BI__builtin_ia32_rsqrt28ps_mask: - case X86::BI__builtin_ia32_vcomisd: - case X86::BI__builtin_ia32_vcomiss: - case X86::BI__builtin_ia32_vcomish: - case X86::BI__builtin_ia32_vcvtph2ps512_mask: - ArgNum = 3; - break; - case X86::BI__builtin_ia32_cmppd512_mask: - case X86::BI__builtin_ia32_cmpps512_mask: - case X86::BI__builtin_ia32_cmpsd_mask: - case X86::BI__builtin_ia32_cmpss_mask: - case X86::BI__builtin_ia32_cmpsh_mask: - case X86::BI__builtin_ia32_vcvtsh2sd_round_mask: - case X86::BI__builtin_ia32_vcvtsh2ss_round_mask: - case X86::BI__builtin_ia32_cvtss2sd_round_mask: - case X86::BI__builtin_ia32_getexpsd128_round_mask: - case X86::BI__builtin_ia32_getexpss128_round_mask: - case X86::BI__builtin_ia32_getexpsh128_round_mask: - case X86::BI__builtin_ia32_getmantpd512_mask: - case X86::BI__builtin_ia32_getmantps512_mask: - case X86::BI__builtin_ia32_getmantph512_mask: - case X86::BI__builtin_ia32_maxsd_round_mask: - case X86::BI__builtin_ia32_maxss_round_mask: - case X86::BI__builtin_ia32_maxsh_round_mask: - case X86::BI__builtin_ia32_minsd_round_mask: - case X86::BI__builtin_ia32_minss_round_mask: - case X86::BI__builtin_ia32_minsh_round_mask: - case X86::BI__builtin_ia32_rcp28sd_round_mask: - case X86::BI__builtin_ia32_rcp28ss_round_mask: - case X86::BI__builtin_ia32_reducepd512_mask: - case X86::BI__builtin_ia32_reduceps512_mask: - case X86::BI__builtin_ia32_reduceph512_mask: - case X86::BI__builtin_ia32_rndscalepd_mask: - case X86::BI__builtin_ia32_rndscaleps_mask: - case X86::BI__builtin_ia32_rndscaleph_mask: - case X86::BI__builtin_ia32_rsqrt28sd_round_mask: - case X86::BI__builtin_ia32_rsqrt28ss_round_mask: - ArgNum = 4; - break; - case X86::BI__builtin_ia32_fixupimmpd512_mask: - case X86::BI__builtin_ia32_fixupimmpd512_maskz: - case X86::BI__builtin_ia32_fixupimmps512_mask: - case X86::BI__builtin_ia32_fixupimmps512_maskz: - case X86::BI__builtin_ia32_fixupimmsd_mask: - case X86::BI__builtin_ia32_fixupimmsd_maskz: - case X86::BI__builtin_ia32_fixupimmss_mask: - case X86::BI__builtin_ia32_fixupimmss_maskz: - case X86::BI__builtin_ia32_getmantsd_round_mask: - case X86::BI__builtin_ia32_getmantss_round_mask: - case X86::BI__builtin_ia32_getmantsh_round_mask: - case X86::BI__builtin_ia32_rangepd512_mask: - case X86::BI__builtin_ia32_rangeps512_mask: - case X86::BI__builtin_ia32_rangesd128_round_mask: - case X86::BI__builtin_ia32_rangess128_round_mask: - case X86::BI__builtin_ia32_reducesd_mask: - case X86::BI__builtin_ia32_reducess_mask: - case X86::BI__builtin_ia32_reducesh_mask: - case X86::BI__builtin_ia32_rndscalesd_round_mask: - case X86::BI__builtin_ia32_rndscaless_round_mask: - case X86::BI__builtin_ia32_rndscalesh_round_mask: - ArgNum = 5; - break; - case X86::BI__builtin_ia32_vcvtsd2si64: - case X86::BI__builtin_ia32_vcvtsd2si32: - case X86::BI__builtin_ia32_vcvtsd2usi32: - case X86::BI__builtin_ia32_vcvtsd2usi64: - case X86::BI__builtin_ia32_vcvtss2si32: - case X86::BI__builtin_ia32_vcvtss2si64: - case X86::BI__builtin_ia32_vcvtss2usi32: - case X86::BI__builtin_ia32_vcvtss2usi64: - case X86::BI__builtin_ia32_vcvtsh2si32: - case X86::BI__builtin_ia32_vcvtsh2si64: - case X86::BI__builtin_ia32_vcvtsh2usi32: - case X86::BI__builtin_ia32_vcvtsh2usi64: - case X86::BI__builtin_ia32_sqrtpd512: - case X86::BI__builtin_ia32_sqrtps512: - case X86::BI__builtin_ia32_sqrtph512: - ArgNum = 1; - HasRC = true; - break; - case X86::BI__builtin_ia32_addph512: - case X86::BI__builtin_ia32_divph512: - case X86::BI__builtin_ia32_mulph512: - case X86::BI__builtin_ia32_subph512: - case X86::BI__builtin_ia32_addpd512: - case X86::BI__builtin_ia32_addps512: - case X86::BI__builtin_ia32_divpd512: - case X86::BI__builtin_ia32_divps512: - case X86::BI__builtin_ia32_mulpd512: - case X86::BI__builtin_ia32_mulps512: - case X86::BI__builtin_ia32_subpd512: - case X86::BI__builtin_ia32_subps512: - case X86::BI__builtin_ia32_cvtsi2sd64: - case X86::BI__builtin_ia32_cvtsi2ss32: - case X86::BI__builtin_ia32_cvtsi2ss64: - case X86::BI__builtin_ia32_cvtusi2sd64: - case X86::BI__builtin_ia32_cvtusi2ss32: - case X86::BI__builtin_ia32_cvtusi2ss64: - case X86::BI__builtin_ia32_vcvtusi2sh: - case X86::BI__builtin_ia32_vcvtusi642sh: - case X86::BI__builtin_ia32_vcvtsi2sh: - case X86::BI__builtin_ia32_vcvtsi642sh: - ArgNum = 2; - HasRC = true; - break; - case X86::BI__builtin_ia32_cvtdq2ps512_mask: - case X86::BI__builtin_ia32_cvtudq2ps512_mask: - case X86::BI__builtin_ia32_vcvtpd2ph512_mask: - case X86::BI__builtin_ia32_vcvtps2phx512_mask: - case X86::BI__builtin_ia32_cvtpd2ps512_mask: - case X86::BI__builtin_ia32_cvtpd2dq512_mask: - case X86::BI__builtin_ia32_cvtpd2qq512_mask: - case X86::BI__builtin_ia32_cvtpd2udq512_mask: - case X86::BI__builtin_ia32_cvtpd2uqq512_mask: - case X86::BI__builtin_ia32_cvtps2dq512_mask: - case X86::BI__builtin_ia32_cvtps2qq512_mask: - case X86::BI__builtin_ia32_cvtps2udq512_mask: - case X86::BI__builtin_ia32_cvtps2uqq512_mask: - case X86::BI__builtin_ia32_cvtqq2pd512_mask: - case X86::BI__builtin_ia32_cvtqq2ps512_mask: - case X86::BI__builtin_ia32_cvtuqq2pd512_mask: - case X86::BI__builtin_ia32_cvtuqq2ps512_mask: - case X86::BI__builtin_ia32_vcvtdq2ph512_mask: - case X86::BI__builtin_ia32_vcvtudq2ph512_mask: - case X86::BI__builtin_ia32_vcvtw2ph512_mask: - case X86::BI__builtin_ia32_vcvtuw2ph512_mask: - case X86::BI__builtin_ia32_vcvtph2w512_mask: - case X86::BI__builtin_ia32_vcvtph2uw512_mask: - case X86::BI__builtin_ia32_vcvtph2dq512_mask: - case X86::BI__builtin_ia32_vcvtph2udq512_mask: - case X86::BI__builtin_ia32_vcvtph2qq512_mask: - case X86::BI__builtin_ia32_vcvtph2uqq512_mask: - case X86::BI__builtin_ia32_vcvtqq2ph512_mask: - case X86::BI__builtin_ia32_vcvtuqq2ph512_mask: - ArgNum = 3; - HasRC = true; - break; - case X86::BI__builtin_ia32_addsh_round_mask: - case X86::BI__builtin_ia32_addss_round_mask: - case X86::BI__builtin_ia32_addsd_round_mask: - case X86::BI__builtin_ia32_divsh_round_mask: - case X86::BI__builtin_ia32_divss_round_mask: - case X86::BI__builtin_ia32_divsd_round_mask: - case X86::BI__builtin_ia32_mulsh_round_mask: - case X86::BI__builtin_ia32_mulss_round_mask: - case X86::BI__builtin_ia32_mulsd_round_mask: - case X86::BI__builtin_ia32_subsh_round_mask: - case X86::BI__builtin_ia32_subss_round_mask: - case X86::BI__builtin_ia32_subsd_round_mask: - case X86::BI__builtin_ia32_scalefph512_mask: - case X86::BI__builtin_ia32_scalefpd512_mask: - case X86::BI__builtin_ia32_scalefps512_mask: - case X86::BI__builtin_ia32_scalefsd_round_mask: - case X86::BI__builtin_ia32_scalefss_round_mask: - case X86::BI__builtin_ia32_scalefsh_round_mask: - case X86::BI__builtin_ia32_cvtsd2ss_round_mask: - case X86::BI__builtin_ia32_vcvtss2sh_round_mask: - case X86::BI__builtin_ia32_vcvtsd2sh_round_mask: - case X86::BI__builtin_ia32_sqrtsd_round_mask: - case X86::BI__builtin_ia32_sqrtss_round_mask: - case X86::BI__builtin_ia32_sqrtsh_round_mask: - case X86::BI__builtin_ia32_vfmaddsd3_mask: - case X86::BI__builtin_ia32_vfmaddsd3_maskz: - case X86::BI__builtin_ia32_vfmaddsd3_mask3: - case X86::BI__builtin_ia32_vfmaddss3_mask: - case X86::BI__builtin_ia32_vfmaddss3_maskz: - case X86::BI__builtin_ia32_vfmaddss3_mask3: - case X86::BI__builtin_ia32_vfmaddsh3_mask: - case X86::BI__builtin_ia32_vfmaddsh3_maskz: - case X86::BI__builtin_ia32_vfmaddsh3_mask3: - case X86::BI__builtin_ia32_vfmaddpd512_mask: - case X86::BI__builtin_ia32_vfmaddpd512_maskz: - case X86::BI__builtin_ia32_vfmaddpd512_mask3: - case X86::BI__builtin_ia32_vfmsubpd512_mask3: - case X86::BI__builtin_ia32_vfmaddps512_mask: - case X86::BI__builtin_ia32_vfmaddps512_maskz: - case X86::BI__builtin_ia32_vfmaddps512_mask3: - case X86::BI__builtin_ia32_vfmsubps512_mask3: - case X86::BI__builtin_ia32_vfmaddph512_mask: - case X86::BI__builtin_ia32_vfmaddph512_maskz: - case X86::BI__builtin_ia32_vfmaddph512_mask3: - case X86::BI__builtin_ia32_vfmsubph512_mask3: - case X86::BI__builtin_ia32_vfmaddsubpd512_mask: - case X86::BI__builtin_ia32_vfmaddsubpd512_maskz: - case X86::BI__builtin_ia32_vfmaddsubpd512_mask3: - case X86::BI__builtin_ia32_vfmsubaddpd512_mask3: - case X86::BI__builtin_ia32_vfmaddsubps512_mask: - case X86::BI__builtin_ia32_vfmaddsubps512_maskz: - case X86::BI__builtin_ia32_vfmaddsubps512_mask3: - case X86::BI__builtin_ia32_vfmsubaddps512_mask3: - case X86::BI__builtin_ia32_vfmaddsubph512_mask: - case X86::BI__builtin_ia32_vfmaddsubph512_maskz: - case X86::BI__builtin_ia32_vfmaddsubph512_mask3: - case X86::BI__builtin_ia32_vfmsubaddph512_mask3: - case X86::BI__builtin_ia32_vfmaddcsh_mask: - case X86::BI__builtin_ia32_vfmaddcsh_round_mask: - case X86::BI__builtin_ia32_vfmaddcsh_round_mask3: - case X86::BI__builtin_ia32_vfmaddcph512_mask: - case X86::BI__builtin_ia32_vfmaddcph512_maskz: - case X86::BI__builtin_ia32_vfmaddcph512_mask3: - case X86::BI__builtin_ia32_vfcmaddcsh_mask: - case X86::BI__builtin_ia32_vfcmaddcsh_round_mask: - case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3: - case X86::BI__builtin_ia32_vfcmaddcph512_mask: - case X86::BI__builtin_ia32_vfcmaddcph512_maskz: - case X86::BI__builtin_ia32_vfcmaddcph512_mask3: - case X86::BI__builtin_ia32_vfmulcsh_mask: - case X86::BI__builtin_ia32_vfmulcph512_mask: - case X86::BI__builtin_ia32_vfcmulcsh_mask: - case X86::BI__builtin_ia32_vfcmulcph512_mask: - ArgNum = 4; - HasRC = true; - break; - } - - llvm::APSInt Result; - - // We can't check the value of a dependent argument. - Expr *Arg = TheCall->getArg(ArgNum); - if (Arg->isTypeDependent() || Arg->isValueDependent()) - return false; - - // Check constant-ness first. - if (BuiltinConstantArg(TheCall, ArgNum, Result)) - return true; - - // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit - // is set. If the intrinsic has rounding control(bits 1:0), make sure its only - // combined with ROUND_NO_EXC. If the intrinsic does not have rounding - // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together. - if (Result == 4/*ROUND_CUR_DIRECTION*/ || - Result == 8/*ROUND_NO_EXC*/ || - (!HasRC && Result == 12/*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) || - (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11)) - return false; - - return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding) - << Arg->getSourceRange(); -} - -// Check if the gather/scatter scale is legal. -bool Sema::CheckX86BuiltinGatherScatterScale(unsigned BuiltinID, - CallExpr *TheCall) { - unsigned ArgNum = 0; - switch (BuiltinID) { - default: - return false; - case X86::BI__builtin_ia32_gatherpfdpd: - case X86::BI__builtin_ia32_gatherpfdps: - case X86::BI__builtin_ia32_gatherpfqpd: - case X86::BI__builtin_ia32_gatherpfqps: - case X86::BI__builtin_ia32_scatterpfdpd: - case X86::BI__builtin_ia32_scatterpfdps: - case X86::BI__builtin_ia32_scatterpfqpd: - case X86::BI__builtin_ia32_scatterpfqps: - ArgNum = 3; - break; - case X86::BI__builtin_ia32_gatherd_pd: - case X86::BI__builtin_ia32_gatherd_pd256: - case X86::BI__builtin_ia32_gatherq_pd: - case X86::BI__builtin_ia32_gatherq_pd256: - case X86::BI__builtin_ia32_gatherd_ps: - case X86::BI__builtin_ia32_gatherd_ps256: - case X86::BI__builtin_ia32_gatherq_ps: - case X86::BI__builtin_ia32_gatherq_ps256: - case X86::BI__builtin_ia32_gatherd_q: - case X86::BI__builtin_ia32_gatherd_q256: - case X86::BI__builtin_ia32_gatherq_q: - case X86::BI__builtin_ia32_gatherq_q256: - case X86::BI__builtin_ia32_gatherd_d: - case X86::BI__builtin_ia32_gatherd_d256: - case X86::BI__builtin_ia32_gatherq_d: - case X86::BI__builtin_ia32_gatherq_d256: - case X86::BI__builtin_ia32_gather3div2df: - case X86::BI__builtin_ia32_gather3div2di: - case X86::BI__builtin_ia32_gather3div4df: - ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/93098 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
