https://github.com/FreddyLeaf updated https://github.com/llvm/llvm-project/pull/91323
>From 3bab8062eb7b924234b1f4959adc0bc72fb53417 Mon Sep 17 00:00:00 2001 From: Freddy Ye <freddy...@intel.com> Date: Tue, 7 May 2024 20:57:54 +0800 Subject: [PATCH 1/4] [X86][CFE] Support EGPR in inline assembly. --- clang/lib/Basic/Targets/X86.cpp | 21 +++++++++++++++++++++ clang/test/CodeGen/X86/register_asm.c | 10 ++++++++++ 2 files changed, 31 insertions(+) create mode 100644 clang/test/CodeGen/X86/register_asm.c diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index bf1767c87fe1c..55c1bde31158e 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -66,6 +66,11 @@ static const char *const GCCRegNames[] = { "tmm0", "tmm1", "tmm2", "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", }; +static const char *const ExtendedGCCRegNames[] = { + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", +}; + const TargetInfo::AddlRegName AddlRegNames[] = { {{"al", "ah", "eax", "rax"}, 0}, {{"bl", "bh", "ebx", "rbx"}, 3}, @@ -85,6 +90,16 @@ const TargetInfo::AddlRegName AddlRegNames[] = { {{"r15d", "r15w", "r15b"}, 45}, }; +const TargetInfo::AddlRegName ExtendedAddlRegNames[] = { + {{"r16d", "r16w", "r16b"}, 165}, {{"r17d", "r17w", "r17b"}, 166}, + {{"r18d", "r18w", "r18b"}, 167}, {{"r19d", "r19w", "r19b"}, 168}, + {{"r20d", "r20w", "r20b"}, 169}, {{"r21d", "r21w", "r21b"}, 170}, + {{"r22d", "r22w", "r22b"}, 171}, {{"r23d", "r23w", "r23b"}, 172}, + {{"r24d", "r24w", "r24b"}, 173}, {{"r25d", "r25w", "r25b"}, 174}, + {{"r26d", "r26w", "r26b"}, 175}, {{"r27d", "r27w", "r27b"}, 176}, + {{"r28d", "r28w", "r28b"}, 177}, {{"r29d", "r29w", "r29b"}, 178}, + {{"r30d", "r30w", "r30b"}, 179}, {{"r31d", "r31w", "r31b"}, 180}, +}; } // namespace targets } // namespace clang @@ -1763,10 +1778,16 @@ void X86TargetInfo::fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) con } ArrayRef<const char *> X86TargetInfo::getGCCRegNames() const { + if (HasEGPR) + GCCRegNames.insert(GCCRegNames.end(), ExtendedGCCRegNames.begin(), + ExtendedGCCRegNames.end()); return llvm::ArrayRef(GCCRegNames); } ArrayRef<TargetInfo::AddlRegName> X86TargetInfo::getGCCAddlRegNames() const { + if (HasEGPR) + AddlRegNames.insert(AddlRegNames.end(), ExtendedAddlRegNames.begin(), + ExtendedAddlRegNames.end()); return llvm::ArrayRef(AddlRegNames); } diff --git a/clang/test/CodeGen/X86/register_asm.c b/clang/test/CodeGen/X86/register_asm.c new file mode 100644 index 0000000000000..7986b392deed3 --- /dev/null +++ b/clang/test/CodeGen/X86/register_asm.c @@ -0,0 +1,10 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-unknown %s -o /dev/null +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-feature +egpr %s -o /dev/null + +int foo(void) { + register int a __asm__("ebx"); +#ifdef __EGPR__ + register int b __asm__("r16"); +#endif // __EGPR__ + return a; +} >From f3b36361f247ddd360fc20d0704d3ab8841ea2c8 Mon Sep 17 00:00:00 2001 From: Freddy Ye <freddy...@intel.com> Date: Tue, 7 May 2024 21:22:26 +0800 Subject: [PATCH 2/4] revert refactor --- clang/lib/Basic/Targets/X86.cpp | 44 ++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 4 deletions(-) diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index 55c1bde31158e..be06346609a72 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -67,6 +67,28 @@ static const char *const GCCRegNames[] = { }; static const char *const ExtendedGCCRegNames[] = { + "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", + "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", + "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", "xmm0", "xmm1", + "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "mm0", "mm1", + "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", "r8", "r9", + "r10", "r11", "r12", "r13", "r14", "r15", "xmm8", "xmm9", + "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", "ymm0", "ymm1", + "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", + "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", "xmm16", "xmm17", + "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23", "xmm24", "xmm25", + "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31", "ymm16", "ymm17", + "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23", "ymm24", "ymm25", + "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31", "zmm0", "zmm1", + "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7", "zmm8", "zmm9", + "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", + "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", + "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31", "k0", "k1", + "k2", "k3", "k4", "k5", "k6", "k7", + "cr0", "cr2", "cr3", "cr4", "cr8", + "dr0", "dr1", "dr2", "dr3", "dr6", "dr7", + "bnd0", "bnd1", "bnd2", "bnd3", + "tmm0", "tmm1", "tmm2", "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", }; @@ -91,6 +113,22 @@ const TargetInfo::AddlRegName AddlRegNames[] = { }; const TargetInfo::AddlRegName ExtendedAddlRegNames[] = { + {{"al", "ah", "eax", "rax"}, 0}, + {{"bl", "bh", "ebx", "rbx"}, 3}, + {{"cl", "ch", "ecx", "rcx"}, 2}, + {{"dl", "dh", "edx", "rdx"}, 1}, + {{"esi", "rsi"}, 4}, + {{"edi", "rdi"}, 5}, + {{"esp", "rsp"}, 7}, + {{"ebp", "rbp"}, 6}, + {{"r8d", "r8w", "r8b"}, 38}, + {{"r9d", "r9w", "r9b"}, 39}, + {{"r10d", "r10w", "r10b"}, 40}, + {{"r11d", "r11w", "r11b"}, 41}, + {{"r12d", "r12w", "r12b"}, 42}, + {{"r13d", "r13w", "r13b"}, 43}, + {{"r14d", "r14w", "r14b"}, 44}, + {{"r15d", "r15w", "r15b"}, 45}, {{"r16d", "r16w", "r16b"}, 165}, {{"r17d", "r17w", "r17b"}, 166}, {{"r18d", "r18w", "r18b"}, 167}, {{"r19d", "r19w", "r19b"}, 168}, {{"r20d", "r20w", "r20b"}, 169}, {{"r21d", "r21w", "r21b"}, 170}, @@ -1779,15 +1817,13 @@ void X86TargetInfo::fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) con ArrayRef<const char *> X86TargetInfo::getGCCRegNames() const { if (HasEGPR) - GCCRegNames.insert(GCCRegNames.end(), ExtendedGCCRegNames.begin(), - ExtendedGCCRegNames.end()); + return llvm::ArrayRef(ExtendedGCCRegNames); return llvm::ArrayRef(GCCRegNames); } ArrayRef<TargetInfo::AddlRegName> X86TargetInfo::getGCCAddlRegNames() const { if (HasEGPR) - AddlRegNames.insert(AddlRegNames.end(), ExtendedAddlRegNames.begin(), - ExtendedAddlRegNames.end()); + return llvm::ArrayRef(ExtendedAddlRegNames); return llvm::ArrayRef(AddlRegNames); } >From 733c93c4f7d74cdfdbf0a312149ae8a6bfa4d3e4 Mon Sep 17 00:00:00 2001 From: Freddy Ye <freddy...@intel.com> Date: Tue, 7 May 2024 21:27:30 +0800 Subject: [PATCH 3/4] clang-format --- clang/lib/Basic/Targets/X86.cpp | 37 ++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index be06346609a72..d4fed1bca8715 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -84,13 +84,12 @@ static const char *const ExtendedGCCRegNames[] = { "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31", "k0", "k1", - "k2", "k3", "k4", "k5", "k6", "k7", - "cr0", "cr2", "cr3", "cr4", "cr8", - "dr0", "dr1", "dr2", "dr3", "dr6", "dr7", - "bnd0", "bnd1", "bnd2", "bnd3", - "tmm0", "tmm1", "tmm2", "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", + "k2", "k3", "k4", "k5", "k6", "k7", "cr0", "cr2", + "cr3", "cr4", "cr8", "dr0", "dr1", "dr2", "dr3", "dr6", + "dr7", "bnd0", "bnd1", "bnd2", "bnd3", "tmm0", "tmm1", "tmm2", + "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", "r16", "r17", "r18", + "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", + "r27", "r28", "r29", "r30", "r31", }; const TargetInfo::AddlRegName AddlRegNames[] = { @@ -129,14 +128,22 @@ const TargetInfo::AddlRegName ExtendedAddlRegNames[] = { {{"r13d", "r13w", "r13b"}, 43}, {{"r14d", "r14w", "r14b"}, 44}, {{"r15d", "r15w", "r15b"}, 45}, - {{"r16d", "r16w", "r16b"}, 165}, {{"r17d", "r17w", "r17b"}, 166}, - {{"r18d", "r18w", "r18b"}, 167}, {{"r19d", "r19w", "r19b"}, 168}, - {{"r20d", "r20w", "r20b"}, 169}, {{"r21d", "r21w", "r21b"}, 170}, - {{"r22d", "r22w", "r22b"}, 171}, {{"r23d", "r23w", "r23b"}, 172}, - {{"r24d", "r24w", "r24b"}, 173}, {{"r25d", "r25w", "r25b"}, 174}, - {{"r26d", "r26w", "r26b"}, 175}, {{"r27d", "r27w", "r27b"}, 176}, - {{"r28d", "r28w", "r28b"}, 177}, {{"r29d", "r29w", "r29b"}, 178}, - {{"r30d", "r30w", "r30b"}, 179}, {{"r31d", "r31w", "r31b"}, 180}, + {{"r16d", "r16w", "r16b"}, 165}, + {{"r17d", "r17w", "r17b"}, 166}, + {{"r18d", "r18w", "r18b"}, 167}, + {{"r19d", "r19w", "r19b"}, 168}, + {{"r20d", "r20w", "r20b"}, 169}, + {{"r21d", "r21w", "r21b"}, 170}, + {{"r22d", "r22w", "r22b"}, 171}, + {{"r23d", "r23w", "r23b"}, 172}, + {{"r24d", "r24w", "r24b"}, 173}, + {{"r25d", "r25w", "r25b"}, 174}, + {{"r26d", "r26w", "r26b"}, 175}, + {{"r27d", "r27w", "r27b"}, 176}, + {{"r28d", "r28w", "r28b"}, 177}, + {{"r29d", "r29w", "r29b"}, 178}, + {{"r30d", "r30w", "r30b"}, 179}, + {{"r31d", "r31w", "r31b"}, 180}, }; } // namespace targets } // namespace clang >From 22a17952999aa2b10b8a71c71f7607e37290b973 Mon Sep 17 00:00:00 2001 From: Freddy Ye <freddy...@intel.com> Date: Wed, 8 May 2024 10:02:18 +0800 Subject: [PATCH 4/4] Address comments. --- clang/lib/Basic/Targets/X86.cpp | 51 ++------------------------- clang/test/CodeGen/X86/register_asm.c | 3 -- 2 files changed, 2 insertions(+), 52 deletions(-) diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index d4fed1bca8715..67e2126cf766b 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -64,32 +64,8 @@ static const char *const GCCRegNames[] = { "dr0", "dr1", "dr2", "dr3", "dr6", "dr7", "bnd0", "bnd1", "bnd2", "bnd3", "tmm0", "tmm1", "tmm2", "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", -}; - -static const char *const ExtendedGCCRegNames[] = { - "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", - "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", - "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", "xmm0", "xmm1", - "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "mm0", "mm1", - "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", "r8", "r9", - "r10", "r11", "r12", "r13", "r14", "r15", "xmm8", "xmm9", - "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", "ymm0", "ymm1", - "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", - "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", "xmm16", "xmm17", - "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23", "xmm24", "xmm25", - "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31", "ymm16", "ymm17", - "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23", "ymm24", "ymm25", - "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31", "zmm0", "zmm1", - "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7", "zmm8", "zmm9", - "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15", "zmm16", "zmm17", - "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23", "zmm24", "zmm25", - "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31", "k0", "k1", - "k2", "k3", "k4", "k5", "k6", "k7", "cr0", "cr2", - "cr3", "cr4", "cr8", "dr0", "dr1", "dr2", "dr3", "dr6", - "dr7", "bnd0", "bnd1", "bnd2", "bnd3", "tmm0", "tmm1", "tmm2", - "tmm3", "tmm4", "tmm5", "tmm6", "tmm7", "r16", "r17", "r18", - "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", - "r27", "r28", "r29", "r30", "r31", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", }; const TargetInfo::AddlRegName AddlRegNames[] = { @@ -109,25 +85,6 @@ const TargetInfo::AddlRegName AddlRegNames[] = { {{"r13d", "r13w", "r13b"}, 43}, {{"r14d", "r14w", "r14b"}, 44}, {{"r15d", "r15w", "r15b"}, 45}, -}; - -const TargetInfo::AddlRegName ExtendedAddlRegNames[] = { - {{"al", "ah", "eax", "rax"}, 0}, - {{"bl", "bh", "ebx", "rbx"}, 3}, - {{"cl", "ch", "ecx", "rcx"}, 2}, - {{"dl", "dh", "edx", "rdx"}, 1}, - {{"esi", "rsi"}, 4}, - {{"edi", "rdi"}, 5}, - {{"esp", "rsp"}, 7}, - {{"ebp", "rbp"}, 6}, - {{"r8d", "r8w", "r8b"}, 38}, - {{"r9d", "r9w", "r9b"}, 39}, - {{"r10d", "r10w", "r10b"}, 40}, - {{"r11d", "r11w", "r11b"}, 41}, - {{"r12d", "r12w", "r12b"}, 42}, - {{"r13d", "r13w", "r13b"}, 43}, - {{"r14d", "r14w", "r14b"}, 44}, - {{"r15d", "r15w", "r15b"}, 45}, {{"r16d", "r16w", "r16b"}, 165}, {{"r17d", "r17w", "r17b"}, 166}, {{"r18d", "r18w", "r18b"}, 167}, @@ -1823,14 +1780,10 @@ void X86TargetInfo::fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) con } ArrayRef<const char *> X86TargetInfo::getGCCRegNames() const { - if (HasEGPR) - return llvm::ArrayRef(ExtendedGCCRegNames); return llvm::ArrayRef(GCCRegNames); } ArrayRef<TargetInfo::AddlRegName> X86TargetInfo::getGCCAddlRegNames() const { - if (HasEGPR) - return llvm::ArrayRef(ExtendedAddlRegNames); return llvm::ArrayRef(AddlRegNames); } diff --git a/clang/test/CodeGen/X86/register_asm.c b/clang/test/CodeGen/X86/register_asm.c index 7986b392deed3..b7e3e99e0fe40 100644 --- a/clang/test/CodeGen/X86/register_asm.c +++ b/clang/test/CodeGen/X86/register_asm.c @@ -1,10 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-unknown-unknown %s -o /dev/null -// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-feature +egpr %s -o /dev/null int foo(void) { register int a __asm__("ebx"); -#ifdef __EGPR__ register int b __asm__("r16"); -#endif // __EGPR__ return a; } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits