[clang] [llvm] [clang backend] In AArch64's DataLayout, specify a minimum function alignment of 4. (PR #90702)

[Tim Northover via cfe-commits]

================
@@ -1480,11 +1480,11 @@ AArch64leTargetInfo::AArch64leTargetInfo(const 
llvm::Triple &Triple,
 void AArch64leTargetInfo::setDataLayout() {
   if (getTriple().isOSBinFormatMachO()) {
     if(getTriple().isArch32Bit())
-      resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128", "_");
+      resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32", "_");
----------------
TNorthover wrote:

Yep. CPU would hard-fault if that was violated. All instructions are 4 bytes 
and must be aligned.

https://github.com/llvm/llvm-project/pull/90702
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