[clang] [llvm] [PowerPC] Rename symbols references by tls-local-dynamic model on AIX (PR #84132)

[Felix via cfe-commits]

https://github.com/orcguru updated 
https://github.com/llvm/llvm-project/pull/84132

>From 92ab84000b638e206106bf5b1e9e2e842f5bcf2b Mon Sep 17 00:00:00 2001
From: Ting Wang <ting.wang...@ibm.com>
Date: Wed, 6 Mar 2024 02:51:40 -0500
Subject: [PATCH 1/5] [PowerPC] Rename symbols references by tls-local-dynamic
 model

On AIX, rename those tls-local-dynamic referenced TOC symbols, so that in
following patches we can switch between different TLS models (local-dynamic
or initial-exec) for the same TLS GV in different functions within the same
module.
---
 .../CodeGen/TargetLoweringObjectFileImpl.h    |   5 +-
 llvm/include/llvm/MC/MCContext.h              |   3 +-
 .../llvm/Target/TargetLoweringObjectFile.h    |   6 +-
 .../CodeGen/TargetLoweringObjectFileImpl.cpp  |   8 +-
 llvm/lib/MC/MCContext.cpp                     |   5 +-
 llvm/lib/MC/MCSymbolXCOFF.cpp                 |   6 +-
 .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp  |  15 +-
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp     |   6 +-
 .../test/CodeGen/PowerPC/aix-tls-gd-double.ll |  12 +-
 llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll   |  12 +-
 .../CodeGen/PowerPC/aix-tls-gd-longlong.ll    |  24 +-
 .../PowerPC/aix-tls-ld-unqualified-symbols.ll | 362 ++++++++++++++++++
 .../CodeGen/PowerPC/aix-tls-local-dynamic.ll  |  39 +-
 13 files changed, 460 insertions(+), 43 deletions(-)
 create mode 100644 llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll

diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h 
b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
index 8eef45ce565deb..1aa25e98423afa 100644
--- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+++ b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
@@ -279,8 +279,9 @@ class TargetLoweringObjectFileXCOFF : public 
TargetLoweringObjectFile {
   MCSection *
   getSectionForFunctionDescriptor(const Function *F,
                                   const TargetMachine &TM) const override;
-  MCSection *getSectionForTOCEntry(const MCSymbol *Sym,
-                                   const TargetMachine &TM) const override;
+  MCSection *
+  getSectionForTOCEntry(const MCSymbol *Sym, const TargetMachine &TM,
+                        const MCSymbolRefExpr::VariantKind VK) const override;
 
   /// For external functions, this will always return a function descriptor
   /// csect.
diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h
index 68d6f3e59d2d41..5e1473b7f78eb8 100644
--- a/llvm/include/llvm/MC/MCContext.h
+++ b/llvm/include/llvm/MC/MCContext.h
@@ -678,7 +678,8 @@ class MCContext {
       std::optional<XCOFF::CsectProperties> CsectProp = std::nullopt,
       bool MultiSymbolsAllowed = false, const char *BeginSymName = nullptr,
       std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSubtypeFlags =
-          std::nullopt);
+          std::nullopt,
+      StringRef RenamePrefix = StringRef());
 
   // Create and save a copy of STI and return a reference to the copy.
   MCSubtargetInfo &getSubtargetCopy(const MCSubtargetInfo &STI);
diff --git a/llvm/include/llvm/Target/TargetLoweringObjectFile.h 
b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
index 0c09cfe684783b..31a466a18d77a2 100644
--- a/llvm/include/llvm/Target/TargetLoweringObjectFile.h
+++ b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
@@ -14,6 +14,7 @@
 #ifndef LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
 #define LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
 
+#include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/MCRegister.h"
 #include <cstdint>
@@ -256,8 +257,9 @@ class TargetLoweringObjectFile : public MCObjectFileInfo {
   /// On targets that support TOC entries, return a section for the entry given
   /// the symbol it refers to.
   /// TODO: Implement this interface for existing ELF targets.
-  virtual MCSection *getSectionForTOCEntry(const MCSymbol *S,
-                                           const TargetMachine &TM) const {
+  virtual MCSection *
+  getSectionForTOCEntry(const MCSymbol *S, const TargetMachine &TM,
+                        const MCSymbolRefExpr::VariantKind VK) const {
     return nullptr;
   }
 
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp 
b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 6943ce261d9d9c..ec17ceb9c83ece 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2679,7 +2679,8 @@ MCSection 
*TargetLoweringObjectFileXCOFF::getSectionForFunctionDescriptor(
 }
 
 MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
-    const MCSymbol *Sym, const TargetMachine &TM) const {
+    const MCSymbol *Sym, const TargetMachine &TM,
+    const MCSymbolRefExpr::VariantKind VK) const {
   // Use TE storage-mapping class when large code model is enabled so that
   // the chance of needing -bbigtoc is decreased. Also, the toc-entry for
   // EH info is never referenced directly using instructions so it can be
@@ -2694,7 +2695,10 @@ MCSection 
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
            cast<MCSymbolXCOFF>(Sym)->isEHInfo())
               ? XCOFF::XMC_TE
               : XCOFF::XMC_TC,
-          XCOFF::XTY_SD));
+          XCOFF::XTY_SD),
+      /*MultiSymbolsAllowed=*/false, /*BeginSymName=*/nullptr,
+      /*DwarfSubtypeFlags=*/std::nullopt,
+      (VK == MCSymbolRefExpr::VK_PPC_AIX_TLSLD ? "_$TLSLD." : StringRef()));
 }
 
 MCSection *TargetLoweringObjectFileXCOFF::getSectionForLSDA(
diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index ba5cefaf18c1fd..dd289147034371 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -780,7 +780,8 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
     StringRef Section, SectionKind Kind,
     std::optional<XCOFF::CsectProperties> CsectProp, bool MultiSymbolsAllowed,
     const char *BeginSymName,
-    std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags) {
+    std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags,
+    StringRef RenamePrefix) {
   bool IsDwarfSec = DwarfSectionSubtypeFlags.has_value();
   assert((IsDwarfSec != CsectProp.has_value()) && "Invalid XCOFF section!");
 
@@ -806,7 +807,7 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(CachedName));
   else
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(
-        CachedName + "[" +
+        RenamePrefix + CachedName + "[" +
         XCOFF::getMappingClassString(CsectProp->MappingClass) + "]"));
 
   MCSymbol *Begin = nullptr;
diff --git a/llvm/lib/MC/MCSymbolXCOFF.cpp b/llvm/lib/MC/MCSymbolXCOFF.cpp
index b4c96a1ffa2333..17f0bcf77745af 100644
--- a/llvm/lib/MC/MCSymbolXCOFF.cpp
+++ b/llvm/lib/MC/MCSymbolXCOFF.cpp
@@ -24,7 +24,11 @@ void MCSymbolXCOFF::setRepresentedCsect(MCSectionXCOFF *C) {
   assert((!RepresentedCsect || RepresentedCsect == C) &&
          "Trying to set a csect that doesn't match the one that this symbol is 
"
          "already mapped to.");
-  assert(getSymbolTableName().equals(C->getSymbolTableName()) &&
+  // Csect representation related symbols access by using TLS local-dynamic
+  // model have prefix "_$TLSLD." before their names.
+  assert((getSymbolTableName().equals(C->getSymbolTableName()) ||
+          getSymbolTableName().equals(std::string("_$TLSLD.") +
+                                      C->getSymbolTableName().str())) &&
          "SymbolTableNames need to be the same for this symbol and its csect "
          "representation.");
   RepresentedCsect = C;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp 
b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index b849b7be7b7be8..0263c3588a2283 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -231,6 +231,20 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
       MCSymbolXCOFF *TCSym =
           cast<MCSectionXCOFF>(Streamer.getCurrentSectionOnly())
               ->getQualNameSymbol();
+
+      // On AIX, symbol accessed using TLS local-dynamic model has been renamed
+      // by adding prefix "_$TLSLD.". Do assert that it has been renamed, and
+      // then emit the .rename with the original symbol name.
+      if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD) {
+        assert(TCSym->hasRename());
+        OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
+           << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
+        StringRef Lhs, Rhs;
+        std::tie(Lhs, Rhs) = TCSym->getSymbolTableName().split("_$TLSLD.");
+        Streamer.emitXCOFFRenameDirective(TCSym, Rhs);
+        return;
+      }
+
       // On AIX, we have TLS variable offsets (symbol@({gd|ie|le|ld}) depending
       // on the TLS access method (or model). For the general-dynamic access
       // method, we also have region handle (symbol@m) for each variable. For
@@ -242,7 +256,6 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE ||
-          Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML)
         OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
            << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 9396ca22dacf86..4bf61a74ea7693 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -2872,10 +2872,10 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
       Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();
       MCSymbol *S = OutContext.getOrCreateSymbol(Name);
       TCEntry = cast<MCSectionXCOFF>(
-          getObjFileLowering().getSectionForTOCEntry(S, TM));
+          getObjFileLowering().getSectionForTOCEntry(S, TM, I.first.second));
     } else {
-      TCEntry = cast<MCSectionXCOFF>(
-          getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));
+      TCEntry = 
cast<MCSectionXCOFF>(getObjFileLowering().getSectionForTOCEntry(
+          I.first.first, TM, I.first.second));
     }
     OutStreamer->switchSection(TCEntry);
 
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
index ae41b6b1301064..d84f92b11c9781 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
@@ -636,7 +636,8 @@ entry:
 ; SMALL32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL:  L..C5:
-; SMALL32-NEXT:   .tc TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
 ; SMALL32-LABEL:  L..C6:
 ; SMALL32-NEXT:   .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL32-LABEL:  L..C7:
@@ -654,7 +655,8 @@ entry:
 ; LARGE32-LABEL:  L..C3:
 ; LARGE32-NEXT:   .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL:  L..C4:
-; LARGE32-NEXT:   .tc TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
 ; LARGE32-LABEL:  L..C5:
 ; LARGE32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -678,7 +680,8 @@ entry:
 ; SMALL64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C5:
-; SMALL64-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
 ; SMALL64-LABEL:  L..C6:
 ; SMALL64-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL64-LABEL:  L..C7:
@@ -699,7 +702,8 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C5:
-; LARGE64-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
 ; LARGE64-LABEL:  L..C6:
 ; LARGE64-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE64-LABEL:  L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
index bbb8e04b67b95e..f9567840a19651 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
@@ -651,7 +651,8 @@ entry:
 ; SMALL32-NEXT:         .tc 
_Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:         .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL: L..C5:
-; SMALL32-NEXT:         .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
 ; SMALL32-LABEL: L..C6:
 ; SMALL32-NEXT:         .tc .TWUninit[TC],TWUninit[TL]@m
 ; SMALL32-LABEL: L..C7:
@@ -669,7 +670,8 @@ entry:
 ; LARGE32-LABEL: L..C3:
 ; LARGE32-NEXT:  .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
 ; LARGE32-LABEL: L..C5:
 ; LARGE32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -693,7 +695,8 @@ entry:
 ; SMALL64-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C5:
-; SMALL64-NEXT:   .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
 ; SMALL64-LABEL:  L..C6:
 ; SMALL64-NEXT:   .tc .TWUninit[TC],TWUninit[TL]@m
 ; SMALL64-LABEL:  L..C7:
@@ -714,7 +717,8 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C5:
-; LARGE64-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
 ; LARGE64-LABEL:  L..C6:
 ; LARGE64-NEXT:  .tc .TWUninit[TE],TWUninit[TL]@m
 ; LARGE64-LABEL:  L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
index ff087a2144488c..06937635bbd183 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
@@ -687,9 +687,11 @@ entry:
 ; SMALL32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL:  L..C3:
-; SMALL32-NEXT:  .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
 ; SMALL32-LABEL:  L..C4:
-; SMALL32-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
 ; SMALL32-LABEL:  L..C5:
 ; SMALL32-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL32-LABEL:  L..C6:
@@ -703,12 +705,14 @@ entry:
 ; LARGE32-LABEL:  L..C1:
 ; LARGE32-NEXT:  .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL:  L..C2:
-; LARGE32-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
 ; LARGE32-LABEL:  L..C3:
 ; LARGE32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE32-LABEL:  L..C4:
-; LARGE32-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
 ; LARGE32-LABEL:  L..C5:
 ; LARGE32-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE32-LABEL:  L..C6:
@@ -725,9 +729,11 @@ entry:
 ; SMALL64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C3:
-; SMALL64-NEXT:  .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
 ; SMALL64-LABEL:  L..C4:
-; SMALL64-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
 ; SMALL64-LABEL:  L..C5:
 ; SMALL64-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL64-LABEL:  L..C6:
@@ -744,9 +750,11 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C3:
-; LARGE64-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
 ; LARGE64-LABEL:  L..C4:
-; LARGE64-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
 ; LARGE64-LABEL:  L..C5:
 ; LARGE64-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE64-LABEL:  L..C6:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
new file mode 100644
index 00000000000000..d92375730a95a7
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
@@ -0,0 +1,362 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc64-ibm-aix-xcoff \
+; RUN:     --code-model=small < %s | FileCheck %s 
--check-prefixes=SMALL64,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc64-ibm-aix-xcoff \
+; RUN:     --code-model=large < %s | FileCheck %s 
--check-prefixes=LARGE64,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc-ibm-aix-xcoff \
+; RUN:     --code-model=small < %s | FileCheck %s 
--check-prefixes=SMALL32,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc-ibm-aix-xcoff \
+; RUN:     --code-model=large < %s | FileCheck %s 
--check-prefixes=LARGE32,COMMON
+
+@_$TLSLD. = thread_local(localdynamic) global i32 42, align 4
+@_$TLSLD.a = thread_local(localdynamic) global i32 42, align 4
+@__$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
+@_$TLSLD._$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
+
+declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
+
+define i32 @loadSym1() {
+; SMALL64-LABEL: loadSym1:
+; SMALL64:       # %bb.0: # %entry
+; SMALL64-NEXT:    mflr 0
+; SMALL64-NEXT:    stdu 1, -48(1)
+; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT:    std 0, 64(1)
+; SMALL64-NEXT:    bla .__tls_get_mod[PR]
+; SMALL64-NEXT:    ld 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
+; SMALL64-NEXT:    lwzx 3, 3, 4
+; SMALL64-NEXT:    addi 1, 1, 48
+; SMALL64-NEXT:    ld 0, 16(1)
+; SMALL64-NEXT:    mtlr 0
+; SMALL64-NEXT:    blr
+;
+; LARGE64-LABEL: loadSym1:
+; LARGE64:       # %bb.0: # %entry
+; LARGE64-NEXT:    mflr 0
+; LARGE64-NEXT:    stdu 1, -48(1)
+; LARGE64-NEXT:    addis 3, L..C0@u(2)
+; LARGE64-NEXT:    addis 6, L..C1@u(2)
+; LARGE64-NEXT:    std 0, 64(1)
+; LARGE64-NEXT:    ld 3, L..C0@l(3)
+; LARGE64-NEXT:    bla .__tls_get_mod[PR]
+; LARGE64-NEXT:    ld 4, L..C1@l(6)
+; LARGE64-NEXT:    lwzx 3, 3, 4
+; LARGE64-NEXT:    addi 1, 1, 48
+; LARGE64-NEXT:    ld 0, 16(1)
+; LARGE64-NEXT:    mtlr 0
+; LARGE64-NEXT:    blr
+;
+; SMALL32-LABEL: loadSym1:
+; SMALL32:       # %bb.0: # %entry
+; SMALL32-NEXT:    mflr 0
+; SMALL32-NEXT:    stwu 1, -32(1)
+; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT:    stw 0, 40(1)
+; SMALL32-NEXT:    bla .__tls_get_mod[PR]
+; SMALL32-NEXT:    lwz 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
+; SMALL32-NEXT:    lwzx 3, 3, 4
+; SMALL32-NEXT:    addi 1, 1, 32
+; SMALL32-NEXT:    lwz 0, 8(1)
+; SMALL32-NEXT:    mtlr 0
+; SMALL32-NEXT:    blr
+;
+; LARGE32-LABEL: loadSym1:
+; LARGE32:       # %bb.0: # %entry
+; LARGE32-NEXT:    mflr 0
+; LARGE32-NEXT:    stwu 1, -32(1)
+; LARGE32-NEXT:    stw 0, 40(1)
+; LARGE32-NEXT:    addis 6, L..C0@u(2)
+; LARGE32-NEXT:    addis 3, L..C1@u(2)
+; LARGE32-NEXT:    lwz 3, L..C1@l(3)
+; LARGE32-NEXT:    bla .__tls_get_mod[PR]
+; LARGE32-NEXT:    lwz 4, L..C0@l(6)
+; LARGE32-NEXT:    lwzx 3, 3, 4
+; LARGE32-NEXT:    addi 1, 1, 32
+; LARGE32-NEXT:    lwz 0, 8(1)
+; LARGE32-NEXT:    mtlr 0
+; LARGE32-NEXT:    blr
+entry:
+  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD.)
+  %1 = load i32, ptr %0, align 4
+  ret i32 %1
+}
+
+define i32 @loadSym2() {
+; SMALL64-LABEL: loadSym2:
+; SMALL64:       # %bb.0: # %entry
+; SMALL64-NEXT:    mflr 0
+; SMALL64-NEXT:    stdu 1, -48(1)
+; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT:    std 0, 64(1)
+; SMALL64-NEXT:    bla .__tls_get_mod[PR]
+; SMALL64-NEXT:    ld 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
+; SMALL64-NEXT:    lwzx 3, 3, 4
+; SMALL64-NEXT:    addi 1, 1, 48
+; SMALL64-NEXT:    ld 0, 16(1)
+; SMALL64-NEXT:    mtlr 0
+; SMALL64-NEXT:    blr
+;
+; LARGE64-LABEL: loadSym2:
+; LARGE64:       # %bb.0: # %entry
+; LARGE64-NEXT:    mflr 0
+; LARGE64-NEXT:    stdu 1, -48(1)
+; LARGE64-NEXT:    addis 3, L..C0@u(2)
+; LARGE64-NEXT:    addis 6, L..C2@u(2)
+; LARGE64-NEXT:    std 0, 64(1)
+; LARGE64-NEXT:    ld 3, L..C0@l(3)
+; LARGE64-NEXT:    bla .__tls_get_mod[PR]
+; LARGE64-NEXT:    ld 4, L..C2@l(6)
+; LARGE64-NEXT:    lwzx 3, 3, 4
+; LARGE64-NEXT:    addi 1, 1, 48
+; LARGE64-NEXT:    ld 0, 16(1)
+; LARGE64-NEXT:    mtlr 0
+; LARGE64-NEXT:    blr
+;
+; SMALL32-LABEL: loadSym2:
+; SMALL32:       # %bb.0: # %entry
+; SMALL32-NEXT:    mflr 0
+; SMALL32-NEXT:    stwu 1, -32(1)
+; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT:    stw 0, 40(1)
+; SMALL32-NEXT:    bla .__tls_get_mod[PR]
+; SMALL32-NEXT:    lwz 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
+; SMALL32-NEXT:    lwzx 3, 3, 4
+; SMALL32-NEXT:    addi 1, 1, 32
+; SMALL32-NEXT:    lwz 0, 8(1)
+; SMALL32-NEXT:    mtlr 0
+; SMALL32-NEXT:    blr
+;
+; LARGE32-LABEL: loadSym2:
+; LARGE32:       # %bb.0: # %entry
+; LARGE32-NEXT:    mflr 0
+; LARGE32-NEXT:    stwu 1, -32(1)
+; LARGE32-NEXT:    stw 0, 40(1)
+; LARGE32-NEXT:    addis 6, L..C2@u(2)
+; LARGE32-NEXT:    addis 3, L..C1@u(2)
+; LARGE32-NEXT:    lwz 3, L..C1@l(3)
+; LARGE32-NEXT:    bla .__tls_get_mod[PR]
+; LARGE32-NEXT:    lwz 4, L..C2@l(6)
+; LARGE32-NEXT:    lwzx 3, 3, 4
+; LARGE32-NEXT:    addi 1, 1, 32
+; LARGE32-NEXT:    lwz 0, 8(1)
+; LARGE32-NEXT:    mtlr 0
+; LARGE32-NEXT:    blr
+entry:
+  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD.a)
+  %1 = load i32, ptr %0, align 4
+  ret i32 %1
+}
+
+define i32 @loadSym3() {
+; SMALL64-LABEL: loadSym3:
+; SMALL64:       # %bb.0: # %entry
+; SMALL64-NEXT:    mflr 0
+; SMALL64-NEXT:    stdu 1, -48(1)
+; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT:    std 0, 64(1)
+; SMALL64-NEXT:    bla .__tls_get_mod[PR]
+; SMALL64-NEXT:    ld 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
+; SMALL64-NEXT:    lwzx 3, 3, 4
+; SMALL64-NEXT:    addi 1, 1, 48
+; SMALL64-NEXT:    ld 0, 16(1)
+; SMALL64-NEXT:    mtlr 0
+; SMALL64-NEXT:    blr
+;
+; LARGE64-LABEL: loadSym3:
+; LARGE64:       # %bb.0: # %entry
+; LARGE64-NEXT:    mflr 0
+; LARGE64-NEXT:    stdu 1, -48(1)
+; LARGE64-NEXT:    addis 3, L..C0@u(2)
+; LARGE64-NEXT:    addis 6, L..C3@u(2)
+; LARGE64-NEXT:    std 0, 64(1)
+; LARGE64-NEXT:    ld 3, L..C0@l(3)
+; LARGE64-NEXT:    bla .__tls_get_mod[PR]
+; LARGE64-NEXT:    ld 4, L..C3@l(6)
+; LARGE64-NEXT:    lwzx 3, 3, 4
+; LARGE64-NEXT:    addi 1, 1, 48
+; LARGE64-NEXT:    ld 0, 16(1)
+; LARGE64-NEXT:    mtlr 0
+; LARGE64-NEXT:    blr
+;
+; SMALL32-LABEL: loadSym3:
+; SMALL32:       # %bb.0: # %entry
+; SMALL32-NEXT:    mflr 0
+; SMALL32-NEXT:    stwu 1, -32(1)
+; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT:    stw 0, 40(1)
+; SMALL32-NEXT:    bla .__tls_get_mod[PR]
+; SMALL32-NEXT:    lwz 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
+; SMALL32-NEXT:    lwzx 3, 3, 4
+; SMALL32-NEXT:    addi 1, 1, 32
+; SMALL32-NEXT:    lwz 0, 8(1)
+; SMALL32-NEXT:    mtlr 0
+; SMALL32-NEXT:    blr
+;
+; LARGE32-LABEL: loadSym3:
+; LARGE32:       # %bb.0: # %entry
+; LARGE32-NEXT:    mflr 0
+; LARGE32-NEXT:    stwu 1, -32(1)
+; LARGE32-NEXT:    stw 0, 40(1)
+; LARGE32-NEXT:    addis 6, L..C3@u(2)
+; LARGE32-NEXT:    addis 3, L..C1@u(2)
+; LARGE32-NEXT:    lwz 3, L..C1@l(3)
+; LARGE32-NEXT:    bla .__tls_get_mod[PR]
+; LARGE32-NEXT:    lwz 4, L..C3@l(6)
+; LARGE32-NEXT:    lwzx 3, 3, 4
+; LARGE32-NEXT:    addi 1, 1, 32
+; LARGE32-NEXT:    lwz 0, 8(1)
+; LARGE32-NEXT:    mtlr 0
+; LARGE32-NEXT:    blr
+entry:
+  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@__$TLSLD.)
+  %1 = load i32, ptr %0, align 4
+  ret i32 %1
+}
+
+define i32 @loadSym4() {
+; SMALL64-LABEL: loadSym4:
+; SMALL64:       # %bb.0: # %entry
+; SMALL64-NEXT:    mflr 0
+; SMALL64-NEXT:    stdu 1, -48(1)
+; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT:    std 0, 64(1)
+; SMALL64-NEXT:    bla .__tls_get_mod[PR]
+; SMALL64-NEXT:    ld 4, L..C4(2) # target-flags(ppc-tlsld) @"_$TLSLD._$TLSLD."
+; SMALL64-NEXT:    lwzx 3, 3, 4
+; SMALL64-NEXT:    addi 1, 1, 48
+; SMALL64-NEXT:    ld 0, 16(1)
+; SMALL64-NEXT:    mtlr 0
+; SMALL64-NEXT:    blr
+;
+; LARGE64-LABEL: loadSym4:
+; LARGE64:       # %bb.0: # %entry
+; LARGE64-NEXT:    mflr 0
+; LARGE64-NEXT:    stdu 1, -48(1)
+; LARGE64-NEXT:    addis 3, L..C0@u(2)
+; LARGE64-NEXT:    addis 6, L..C4@u(2)
+; LARGE64-NEXT:    std 0, 64(1)
+; LARGE64-NEXT:    ld 3, L..C0@l(3)
+; LARGE64-NEXT:    bla .__tls_get_mod[PR]
+; LARGE64-NEXT:    ld 4, L..C4@l(6)
+; LARGE64-NEXT:    lwzx 3, 3, 4
+; LARGE64-NEXT:    addi 1, 1, 48
+; LARGE64-NEXT:    ld 0, 16(1)
+; LARGE64-NEXT:    mtlr 0
+; LARGE64-NEXT:    blr
+;
+; SMALL32-LABEL: loadSym4:
+; SMALL32:       # %bb.0: # %entry
+; SMALL32-NEXT:    mflr 0
+; SMALL32-NEXT:    stwu 1, -32(1)
+; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT:    stw 0, 40(1)
+; SMALL32-NEXT:    bla .__tls_get_mod[PR]
+; SMALL32-NEXT:    lwz 4, L..C4(2) # target-flags(ppc-tlsld) 
@"_$TLSLD._$TLSLD."
+; SMALL32-NEXT:    lwzx 3, 3, 4
+; SMALL32-NEXT:    addi 1, 1, 32
+; SMALL32-NEXT:    lwz 0, 8(1)
+; SMALL32-NEXT:    mtlr 0
+; SMALL32-NEXT:    blr
+;
+; LARGE32-LABEL: loadSym4:
+; LARGE32:       # %bb.0: # %entry
+; LARGE32-NEXT:    mflr 0
+; LARGE32-NEXT:    stwu 1, -32(1)
+; LARGE32-NEXT:    stw 0, 40(1)
+; LARGE32-NEXT:    addis 6, L..C4@u(2)
+; LARGE32-NEXT:    addis 3, L..C1@u(2)
+; LARGE32-NEXT:    lwz 3, L..C1@l(3)
+; LARGE32-NEXT:    bla .__tls_get_mod[PR]
+; LARGE32-NEXT:    lwz 4, L..C4@l(6)
+; LARGE32-NEXT:    lwzx 3, 3, 4
+; LARGE32-NEXT:    addi 1, 1, 32
+; LARGE32-NEXT:    lwz 0, 8(1)
+; LARGE32-NEXT:    mtlr 0
+; LARGE32-NEXT:    blr
+entry:
+  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD._$TLSLD.)
+  %1 = load i32, ptr %0, align 4
+  ret i32 %1
+}
+
+; COMMON:      .csect _Renamed..5f24__TLSLD.[TL],2
+; COMMON-NEXT: .globl  _Renamed..5f24__TLSLD.[TL]      # @"_$TLSLD."
+; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.[TL],"_$TLSLD."
+; COMMON:      .csect _Renamed..5f24__TLSLD.a[TL],2
+; COMMON-NEXT: .globl  _Renamed..5f24__TLSLD.a[TL]     # @"_$TLSLD.a"
+; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.a[TL],"_$TLSLD.a"
+; COMMON:      .csect _Renamed..5f5f24___TLSLD.[TL],2
+; COMMON-NEXT: .lglobl _Renamed..5f5f24___TLSLD.[TL]   # @"__$TLSLD."
+; COMMON-NEXT: .rename _Renamed..5f5f24___TLSLD.[TL],"__$TLSLD."
+; COMMON:      .csect _Renamed..5f245f24__TLSLD.__TLSLD.[TL],2
+; COMMON-NEXT: .lglobl _Renamed..5f245f24__TLSLD.__TLSLD.[TL] # 
@"_$TLSLD._$TLSLD."
+; COMMON-NEXT: .rename 
_Renamed..5f245f24__TLSLD.__TLSLD.[TL],"_$TLSLD._$TLSLD."
+
+; SMALL64-LABEL: .toc
+; SMALL64-LABEL: L..C0:
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; SMALL64-LABEL: L..C1:
+; SMALL64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
+; SMALL64-LABEL: L..C2:
+; SMALL64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
+; SMALL64-LABEL: L..C3:
+; SMALL64-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
+; SMALL64-LABEL: L..C4:
+; SMALL64-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
+
+; LARGE64-LABEL: .toc
+; LARGE64-LABEL: L..C0:
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; LARGE64-LABEL: L..C1:
+; LARGE64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
+; LARGE64-LABEL: L..C2:
+; LARGE64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
+; LARGE64-LABEL: L..C3:
+; LARGE64-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
+; LARGE64-LABEL: L..C4:
+; LARGE64-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
+
+; SMALL32-LABEL: .toc
+; SMALL32-LABEL: L..C0:
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; SMALL32-LABEL: L..C1:
+; SMALL32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
+; SMALL32-LABEL: L..C2:
+; SMALL32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
+; SMALL32-LABEL: L..C3:
+; SMALL32-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
+; SMALL32-LABEL: L..C4:
+; SMALL32-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
+
+; LARGE32-LABEL: .toc
+; LARGE32-LABEL: L..C0:
+; LARGE32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
+; LARGE32-LABEL: L..C1:
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; LARGE32-LABEL: L..C2:
+; LARGE32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
+; LARGE32-LABEL: L..C3:
+; LARGE32-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
+; LARGE32-LABEL: L..C4:
+; LARGE32-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
+
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
index 22349337f18908..d5dc7e57d36328 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
@@ -358,39 +358,52 @@ entry:
 ; SMALL-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL:        [[TGInitL]]:
-; SMALL-NEXT:   .tc TGInit[TC],TGInit[TL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TC],TGInit[TL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TC],"TGInit"
 ; SMALL:        [[TGUninitL]]:
-; SMALL-NEXT:   .tc TGUninit[TC],TGUninit[TL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TGUninit[TC],TGUninit[TL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TGUninit[TC],"TGUninit"
 ; SMALL:        [[TIInitL]]:
-; SMALL-NEXT:   .tc TIInit[TC],TIInit[TL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
 ; SMALL:        [[TIUninitL]]:
-; SMALL-NEXT:   .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
 ; SMALL:        [[TWInitL]]:
-; SMALL-NEXT:   .tc TWInit[TC],TWInit[TL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TWInit[TC],TWInit[TL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TWInit[TC],"TWInit"
 ; SMALL:        [[TWUninitL]]:
-; SMALL-NEXT:   .tc TWUninit[TC],TWUninit[TL]@ld
+; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TWUninit[TC],TWUninit[TL]@ld
+; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TWUninit[TC],"TWUninit"
 
 ; LARGE64:        [[ModuleHandleL]]:
 ; LARGE64-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64:        [[TGInitL]]:
-; LARGE64-NEXT:   .tc TGInit[TE],TGInit[TL]@ld
+; LARGE64-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
+; LARGE64-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
 ;
 ; LARGE32:        [[TGInitL]]:
-; LARGE32-NEXT:   .tc TGInit[TE],TGInit[TL]@ld
+; LARGE32-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
+; LARGE32-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
 ; LARGE32:        [[ModuleHandleL]]:
 ; LARGE32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ;
 ; LARGE:        [[TGUninitL]]:
-; LARGE-NEXT:   .tc TGUninit[TE],TGUninit[TL]@ld
+; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TGUninit[TE],TGUninit[TL]@ld
+; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TGUninit[TE],"TGUninit"
 ; LARGE:        [[TIInitL]]:
-; LARGE-NEXT:   .tc TIInit[TE],TIInit[TL]@ld
+; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
 ; LARGE:        [[TIUninitL]]:
-; LARGE-NEXT:   .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
 ; LARGE:        [[TWInitL]]:
-; LARGE-NEXT:   .tc TWInit[TE],TWInit[TL]@ld
+; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TWInit[TE],TWInit[TL]@ld
+; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TWInit[TE],"TWInit"
 ; LARGE:        [[TWUninitL]]:
-; LARGE-NEXT:   .tc TWUninit[TE],TWUninit[TL]@ld
+; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TWUninit[TE],TWUninit[TL]@ld
+; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TWUninit[TE],"TWUninit"
 
 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)

>From e0f9db79288deca311f85db05eb3b94ea120385b Mon Sep 17 00:00:00 2001
From: Ting Wang <ting.wang...@ibm.com>
Date: Thu, 7 Mar 2024 00:05:03 -0500
Subject: [PATCH 2/5] [NFC] Update comment.

---
 llvm/lib/MC/MCContext.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index dd289147034371..54ca8a96f0454c 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -806,6 +806,7 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
   if (IsDwarfSec)
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(CachedName));
   else
+    // For TLS local-dynamic model RenamePrefix is "_$TLSLD.", otherwise empty.
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(
         RenamePrefix + CachedName + "[" +
         XCOFF::getMappingClassString(CsectProp->MappingClass) + "]"));

>From f0db7e84938bde4c9db15ecd9ee32464e8c3bb33 Mon Sep 17 00:00:00 2001
From: Ting Wang <ting.wang...@ibm.com>
Date: Thu, 7 Mar 2024 01:57:38 -0500
Subject: [PATCH 3/5] [NFC] Update comments.

---
 llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp 
b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index ec17ceb9c83ece..168f2730092d00 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2687,6 +2687,9 @@ MCSection 
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
   // allocated with TE storage-mapping class.
   // The "_$TLSML" symbol for TLS local-dynamic mode requires XMC_TC, otherwise
   // the AIX assembler will complain.
+  // For AIX TLS local-dynamic symbol references, add fixed prefix "_$TLSLD." 
to
+  // force rename. Different TLS model (local-dynamic and initial-exec) in the
+  // same module can access to the same GV with the rename.
   return getContext().getXCOFFSection(
       cast<MCSymbolXCOFF>(Sym)->getSymbolTableName(), SectionKind::getData(),
       XCOFF::CsectProperties(

>From 98dba4307f2ac24dd85470285291a3a1b3fcba88 Mon Sep 17 00:00:00 2001
From: Ting Wang <ting.wang...@ibm.com>
Date: Thu, 14 Mar 2024 01:41:50 -0400
Subject: [PATCH 4/5] WIP: need check assert

---
 clang/lib/Basic/Targets/PPC.cpp               |  5 +++
 clang/lib/Basic/Targets/PPC.h                 |  1 +
 llvm/lib/Target/PowerPC/PPC.td                |  4 ++
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp     |  7 ++++
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp   | 40 +++++++++++++++++++
 .../Target/PowerPC/PPCMachineFunctionInfo.h   | 12 ++++++
 6 files changed, 69 insertions(+)

diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index aebe51bfa4daad..12eb61aae34441 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -89,6 +89,9 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       IsISA3_1 = true;
     } else if (Feature == "+quadword-atomics") {
       HasQuadwordAtomics = true;
+    } else if (Feature == "+aix-use-tls-initial-exec-for-local-dynamic-in-"
+                          "shared-library") {
+      HasAIXUseTLSIEForLDInSharedLibrary = true;
     }
     // TODO: Finish this list and add an assert that we've handled them
     // all.
@@ -718,6 +721,8 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
       .Case("isa-v30-instructions", IsISA3_0)
       .Case("isa-v31-instructions", IsISA3_1)
       .Case("quadword-atomics", HasQuadwordAtomics)
+      .Case("aix-use-tls-initial-exec-for-local-dynamic-in-shared-library",
+            HasAIXUseTLSIEForLDInSharedLibrary)
       .Default(false);
 }
 
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 70683916a8b04f..b1f36073f0d8a5 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -80,6 +80,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public 
TargetInfo {
   bool IsISA3_0 = false;
   bool IsISA3_1 = false;
   bool HasQuadwordAtomics = false;
+  bool HasAIXUseTLSIEForLDInSharedLibrary = false;
 
 protected:
   std::string ABI;
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 535616d33a8032..00df231ed1885c 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -329,6 +329,10 @@ def FeatureAIXLocalExecTLS :
                    "Produce a TOC-free local-exec TLS sequence for this 
function "
                    "for 64-bit AIX">;
 
+def FeatureAIXUseTLSInitialExecForLocalDynamicInSharedLibraries :
+  
SubtargetFeature<"aix-use-tls-initial-exec-for-local-dynamic-in-shared-library",
 "HasAIXUseTLSIEForLDInSharedLibrary", "true",
+                   "Use TLS initial-exec model for TLS local-dynamic accesses 
in shared libraries loaded with the main function">;
+
 def FeaturePredictableSelectIsExpensive :
   SubtargetFeature<"predictable-select-expensive",
                    "PredictableSelectIsExpensive",
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 4bf61a74ea7693..cd343dd6a622d7 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -848,6 +848,13 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr 
*MI) {
         return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;
       if (Model == TLSModel::InitialExec)
         return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
+      // On AIX, TLS-LD heuristic may have turned LD access into IE access.
+      PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
+      if (Model == TLSModel::LocalDynamic && FuncInfo->isAIXFuncUseTLSIE()) {
+        LLVM_DEBUG(
+            dbgs() << "Current function use IE access for default LD vars.\n");
+        return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
+      }
       llvm_unreachable("Only expecting local-exec or initial-exec accesses!");
     }
     // For GD TLS access on AIX, we have two TOC entries for the symbol (one 
for
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 68c80dd9aa5c76..cfccae27200326 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3369,6 +3369,46 @@ SDValue 
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
   bool Is64Bit = Subtarget.isPPC64();
   bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
   TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+  // Initialize heuristic setting lazily:
+  // (1) Use initial-exec for single TLS var reference within current function.
+  // (2) Use local-dynamic for multiple TLS var references within current func.
+  PPCFunctionInfo *FuncInfo =
+      DAG.getMachineFunction().getInfo<PPCFunctionInfo>();
+  if (Subtarget.hasAIXUseTLSIEForLDInSharedLibrary() &&
+      !FuncInfo->isAIXFuncUseInitDone()) {
+    std::set<const GlobalValue *> TLSGV;
+    for (SDNode &Node : DAG.allnodes()) {
+      SDNode *N = &Node;
+      if (N->getOpcode() == ISD::GlobalTLSAddress) {
+        if (GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N)) {
+          const GlobalValue *GV = GA->getGlobal();
+          TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+          if (Model == TLSModel::InitialExec ||
+              Model == TLSModel::LocalDynamic) {
+            TLSGV.insert(GV);
+          }
+        }
+      }
+    }
+    LLVM_DEBUG(dbgs() << format("TLSGV count:%d\n", TLSGV.size()));
+    if (TLSGV.size() == 1) {
+      FuncInfo->setAIXFuncUseTLSIE();
+    } else if (TLSGV.size() > 1) {
+      FuncInfo->setAIXFuncUseTLSLD();
+    }
+    FuncInfo->setAIXFuncUseInitDone();
+  }
+
+  if (FuncInfo->isAIXFuncUseTLSLD()) {
+    LLVM_DEBUG(dbgs() << DAG.getMachineFunction().getName()
+                      << " function use TLS-LD model for TLS IE/LD vars.\n");
+    Model = TLSModel::LocalDynamic;
+  } else if (FuncInfo->isAIXFuncUseTLSIE()) {
+    LLVM_DEBUG(dbgs() << DAG.getMachineFunction().getName()
+                      << " function use TLS-IE model for TLS IE/LD vars.\n");
+    Model = TLSModel::InitialExec;
+  }
+
   bool IsTLSLocalExecModel = Model == TLSModel::LocalExec;
 
   if (IsTLSLocalExecModel || Model == TLSModel::InitialExec) {
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h 
b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
index df655a3be9512b..03136743358ec0 100644
--- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
@@ -150,6 +150,11 @@ class PPCFunctionInfo : public MachineFunctionInfo {
   /// to use SExt/ZExt flags in later optimization.
   std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
 
+  /// FIXME: Flags for heuristic.
+  bool AIXFuncUseTLSLD = false;
+  bool AIXFuncUseTLSIE = false;
+  bool AIXFuncUseInitDone = false;
+
 public:
   explicit PPCFunctionInfo(const Function &F, const TargetSubtargetInfo *STI);
 
@@ -221,6 +226,13 @@ class PPCFunctionInfo : public MachineFunctionInfo {
   void setHasFastCall() { HasFastCall = true; }
   bool hasFastCall() const { return HasFastCall;}
 
+  void setAIXFuncUseInitDone() { AIXFuncUseInitDone = true; }
+  bool isAIXFuncUseInitDone() const { return AIXFuncUseInitDone; }
+  void setAIXFuncUseTLSLD() { AIXFuncUseTLSLD = true; }
+  bool isAIXFuncUseTLSLD() const { return AIXFuncUseTLSLD; }
+  void setAIXFuncUseTLSIE() { AIXFuncUseTLSIE = true; }
+  bool isAIXFuncUseTLSIE() const { return AIXFuncUseTLSIE; }
+
   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
 

>From a967afeab4b4c84e998aeb8ccdc93db1a61832a9 Mon Sep 17 00:00:00 2001
From: Ting Wang <ting.wang...@ibm.com>
Date: Fri, 15 Mar 2024 02:02:52 -0400
Subject: [PATCH 5/5] Reset to try another approach

---
 clang/lib/Basic/Targets/PPC.cpp               |   5 -
 clang/lib/Basic/Targets/PPC.h                 |   1 -
 .../CodeGen/TargetLoweringObjectFileImpl.h    |   5 +-
 llvm/include/llvm/MC/MCContext.h              |   3 +-
 .../llvm/Target/TargetLoweringObjectFile.h    |   6 +-
 .../CodeGen/TargetLoweringObjectFileImpl.cpp  |  11 +-
 llvm/lib/MC/MCContext.cpp                     |   6 +-
 llvm/lib/MC/MCSymbolXCOFF.cpp                 |   6 +-
 .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp  |  15 +-
 llvm/lib/Target/PowerPC/PPC.td                |   4 -
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp     |  13 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp   |  40 --
 .../Target/PowerPC/PPCMachineFunctionInfo.h   |  12 -
 .../test/CodeGen/PowerPC/aix-tls-gd-double.ll |  12 +-
 llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll   |  12 +-
 .../CodeGen/PowerPC/aix-tls-gd-longlong.ll    |  24 +-
 .../PowerPC/aix-tls-ld-unqualified-symbols.ll | 362 ------------------
 .../CodeGen/PowerPC/aix-tls-local-dynamic.ll  |  39 +-
 18 files changed, 43 insertions(+), 533 deletions(-)
 delete mode 100644 llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll

diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 12eb61aae34441..aebe51bfa4daad 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -89,9 +89,6 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       IsISA3_1 = true;
     } else if (Feature == "+quadword-atomics") {
       HasQuadwordAtomics = true;
-    } else if (Feature == "+aix-use-tls-initial-exec-for-local-dynamic-in-"
-                          "shared-library") {
-      HasAIXUseTLSIEForLDInSharedLibrary = true;
     }
     // TODO: Finish this list and add an assert that we've handled them
     // all.
@@ -721,8 +718,6 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
       .Case("isa-v30-instructions", IsISA3_0)
       .Case("isa-v31-instructions", IsISA3_1)
       .Case("quadword-atomics", HasQuadwordAtomics)
-      .Case("aix-use-tls-initial-exec-for-local-dynamic-in-shared-library",
-            HasAIXUseTLSIEForLDInSharedLibrary)
       .Default(false);
 }
 
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index b1f36073f0d8a5..70683916a8b04f 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -80,7 +80,6 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public 
TargetInfo {
   bool IsISA3_0 = false;
   bool IsISA3_1 = false;
   bool HasQuadwordAtomics = false;
-  bool HasAIXUseTLSIEForLDInSharedLibrary = false;
 
 protected:
   std::string ABI;
diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h 
b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
index 1aa25e98423afa..8eef45ce565deb 100644
--- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+++ b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
@@ -279,9 +279,8 @@ class TargetLoweringObjectFileXCOFF : public 
TargetLoweringObjectFile {
   MCSection *
   getSectionForFunctionDescriptor(const Function *F,
                                   const TargetMachine &TM) const override;
-  MCSection *
-  getSectionForTOCEntry(const MCSymbol *Sym, const TargetMachine &TM,
-                        const MCSymbolRefExpr::VariantKind VK) const override;
+  MCSection *getSectionForTOCEntry(const MCSymbol *Sym,
+                                   const TargetMachine &TM) const override;
 
   /// For external functions, this will always return a function descriptor
   /// csect.
diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h
index 5e1473b7f78eb8..68d6f3e59d2d41 100644
--- a/llvm/include/llvm/MC/MCContext.h
+++ b/llvm/include/llvm/MC/MCContext.h
@@ -678,8 +678,7 @@ class MCContext {
       std::optional<XCOFF::CsectProperties> CsectProp = std::nullopt,
       bool MultiSymbolsAllowed = false, const char *BeginSymName = nullptr,
       std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSubtypeFlags =
-          std::nullopt,
-      StringRef RenamePrefix = StringRef());
+          std::nullopt);
 
   // Create and save a copy of STI and return a reference to the copy.
   MCSubtargetInfo &getSubtargetCopy(const MCSubtargetInfo &STI);
diff --git a/llvm/include/llvm/Target/TargetLoweringObjectFile.h 
b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
index 31a466a18d77a2..0c09cfe684783b 100644
--- a/llvm/include/llvm/Target/TargetLoweringObjectFile.h
+++ b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
@@ -14,7 +14,6 @@
 #ifndef LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
 #define LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
 
-#include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/MCRegister.h"
 #include <cstdint>
@@ -257,9 +256,8 @@ class TargetLoweringObjectFile : public MCObjectFileInfo {
   /// On targets that support TOC entries, return a section for the entry given
   /// the symbol it refers to.
   /// TODO: Implement this interface for existing ELF targets.
-  virtual MCSection *
-  getSectionForTOCEntry(const MCSymbol *S, const TargetMachine &TM,
-                        const MCSymbolRefExpr::VariantKind VK) const {
+  virtual MCSection *getSectionForTOCEntry(const MCSymbol *S,
+                                           const TargetMachine &TM) const {
     return nullptr;
   }
 
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp 
b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 168f2730092d00..6943ce261d9d9c 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2679,17 +2679,13 @@ MCSection 
*TargetLoweringObjectFileXCOFF::getSectionForFunctionDescriptor(
 }
 
 MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
-    const MCSymbol *Sym, const TargetMachine &TM,
-    const MCSymbolRefExpr::VariantKind VK) const {
+    const MCSymbol *Sym, const TargetMachine &TM) const {
   // Use TE storage-mapping class when large code model is enabled so that
   // the chance of needing -bbigtoc is decreased. Also, the toc-entry for
   // EH info is never referenced directly using instructions so it can be
   // allocated with TE storage-mapping class.
   // The "_$TLSML" symbol for TLS local-dynamic mode requires XMC_TC, otherwise
   // the AIX assembler will complain.
-  // For AIX TLS local-dynamic symbol references, add fixed prefix "_$TLSLD." 
to
-  // force rename. Different TLS model (local-dynamic and initial-exec) in the
-  // same module can access to the same GV with the rename.
   return getContext().getXCOFFSection(
       cast<MCSymbolXCOFF>(Sym)->getSymbolTableName(), SectionKind::getData(),
       XCOFF::CsectProperties(
@@ -2698,10 +2694,7 @@ MCSection 
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
            cast<MCSymbolXCOFF>(Sym)->isEHInfo())
               ? XCOFF::XMC_TE
               : XCOFF::XMC_TC,
-          XCOFF::XTY_SD),
-      /*MultiSymbolsAllowed=*/false, /*BeginSymName=*/nullptr,
-      /*DwarfSubtypeFlags=*/std::nullopt,
-      (VK == MCSymbolRefExpr::VK_PPC_AIX_TLSLD ? "_$TLSLD." : StringRef()));
+          XCOFF::XTY_SD));
 }
 
 MCSection *TargetLoweringObjectFileXCOFF::getSectionForLSDA(
diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index 54ca8a96f0454c..ba5cefaf18c1fd 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -780,8 +780,7 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
     StringRef Section, SectionKind Kind,
     std::optional<XCOFF::CsectProperties> CsectProp, bool MultiSymbolsAllowed,
     const char *BeginSymName,
-    std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags,
-    StringRef RenamePrefix) {
+    std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags) {
   bool IsDwarfSec = DwarfSectionSubtypeFlags.has_value();
   assert((IsDwarfSec != CsectProp.has_value()) && "Invalid XCOFF section!");
 
@@ -806,9 +805,8 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
   if (IsDwarfSec)
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(CachedName));
   else
-    // For TLS local-dynamic model RenamePrefix is "_$TLSLD.", otherwise empty.
     QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(
-        RenamePrefix + CachedName + "[" +
+        CachedName + "[" +
         XCOFF::getMappingClassString(CsectProp->MappingClass) + "]"));
 
   MCSymbol *Begin = nullptr;
diff --git a/llvm/lib/MC/MCSymbolXCOFF.cpp b/llvm/lib/MC/MCSymbolXCOFF.cpp
index 17f0bcf77745af..b4c96a1ffa2333 100644
--- a/llvm/lib/MC/MCSymbolXCOFF.cpp
+++ b/llvm/lib/MC/MCSymbolXCOFF.cpp
@@ -24,11 +24,7 @@ void MCSymbolXCOFF::setRepresentedCsect(MCSectionXCOFF *C) {
   assert((!RepresentedCsect || RepresentedCsect == C) &&
          "Trying to set a csect that doesn't match the one that this symbol is 
"
          "already mapped to.");
-  // Csect representation related symbols access by using TLS local-dynamic
-  // model have prefix "_$TLSLD." before their names.
-  assert((getSymbolTableName().equals(C->getSymbolTableName()) ||
-          getSymbolTableName().equals(std::string("_$TLSLD.") +
-                                      C->getSymbolTableName().str())) &&
+  assert(getSymbolTableName().equals(C->getSymbolTableName()) &&
          "SymbolTableNames need to be the same for this symbol and its csect "
          "representation.");
   RepresentedCsect = C;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp 
b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 0263c3588a2283..b849b7be7b7be8 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -231,20 +231,6 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
       MCSymbolXCOFF *TCSym =
           cast<MCSectionXCOFF>(Streamer.getCurrentSectionOnly())
               ->getQualNameSymbol();
-
-      // On AIX, symbol accessed using TLS local-dynamic model has been renamed
-      // by adding prefix "_$TLSLD.". Do assert that it has been renamed, and
-      // then emit the .rename with the original symbol name.
-      if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD) {
-        assert(TCSym->hasRename());
-        OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
-           << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
-        StringRef Lhs, Rhs;
-        std::tie(Lhs, Rhs) = TCSym->getSymbolTableName().split("_$TLSLD.");
-        Streamer.emitXCOFFRenameDirective(TCSym, Rhs);
-        return;
-      }
-
       // On AIX, we have TLS variable offsets (symbol@({gd|ie|le|ld}) depending
       // on the TLS access method (or model). For the general-dynamic access
       // method, we also have region handle (symbol@m) for each variable. For
@@ -256,6 +242,7 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE ||
+          Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD ||
           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML)
         OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
            << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 00df231ed1885c..535616d33a8032 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -329,10 +329,6 @@ def FeatureAIXLocalExecTLS :
                    "Produce a TOC-free local-exec TLS sequence for this 
function "
                    "for 64-bit AIX">;
 
-def FeatureAIXUseTLSInitialExecForLocalDynamicInSharedLibraries :
-  
SubtargetFeature<"aix-use-tls-initial-exec-for-local-dynamic-in-shared-library",
 "HasAIXUseTLSIEForLDInSharedLibrary", "true",
-                   "Use TLS initial-exec model for TLS local-dynamic accesses 
in shared libraries loaded with the main function">;
-
 def FeaturePredictableSelectIsExpensive :
   SubtargetFeature<"predictable-select-expensive",
                    "PredictableSelectIsExpensive",
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index cd343dd6a622d7..9396ca22dacf86 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -848,13 +848,6 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr 
*MI) {
         return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;
       if (Model == TLSModel::InitialExec)
         return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
-      // On AIX, TLS-LD heuristic may have turned LD access into IE access.
-      PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
-      if (Model == TLSModel::LocalDynamic && FuncInfo->isAIXFuncUseTLSIE()) {
-        LLVM_DEBUG(
-            dbgs() << "Current function use IE access for default LD vars.\n");
-        return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
-      }
       llvm_unreachable("Only expecting local-exec or initial-exec accesses!");
     }
     // For GD TLS access on AIX, we have two TOC entries for the symbol (one 
for
@@ -2879,10 +2872,10 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
       Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();
       MCSymbol *S = OutContext.getOrCreateSymbol(Name);
       TCEntry = cast<MCSectionXCOFF>(
-          getObjFileLowering().getSectionForTOCEntry(S, TM, I.first.second));
+          getObjFileLowering().getSectionForTOCEntry(S, TM));
     } else {
-      TCEntry = 
cast<MCSectionXCOFF>(getObjFileLowering().getSectionForTOCEntry(
-          I.first.first, TM, I.first.second));
+      TCEntry = cast<MCSectionXCOFF>(
+          getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));
     }
     OutStreamer->switchSection(TCEntry);
 
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index cfccae27200326..68c80dd9aa5c76 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3369,46 +3369,6 @@ SDValue 
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
   bool Is64Bit = Subtarget.isPPC64();
   bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
   TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
-  // Initialize heuristic setting lazily:
-  // (1) Use initial-exec for single TLS var reference within current function.
-  // (2) Use local-dynamic for multiple TLS var references within current func.
-  PPCFunctionInfo *FuncInfo =
-      DAG.getMachineFunction().getInfo<PPCFunctionInfo>();
-  if (Subtarget.hasAIXUseTLSIEForLDInSharedLibrary() &&
-      !FuncInfo->isAIXFuncUseInitDone()) {
-    std::set<const GlobalValue *> TLSGV;
-    for (SDNode &Node : DAG.allnodes()) {
-      SDNode *N = &Node;
-      if (N->getOpcode() == ISD::GlobalTLSAddress) {
-        if (GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N)) {
-          const GlobalValue *GV = GA->getGlobal();
-          TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
-          if (Model == TLSModel::InitialExec ||
-              Model == TLSModel::LocalDynamic) {
-            TLSGV.insert(GV);
-          }
-        }
-      }
-    }
-    LLVM_DEBUG(dbgs() << format("TLSGV count:%d\n", TLSGV.size()));
-    if (TLSGV.size() == 1) {
-      FuncInfo->setAIXFuncUseTLSIE();
-    } else if (TLSGV.size() > 1) {
-      FuncInfo->setAIXFuncUseTLSLD();
-    }
-    FuncInfo->setAIXFuncUseInitDone();
-  }
-
-  if (FuncInfo->isAIXFuncUseTLSLD()) {
-    LLVM_DEBUG(dbgs() << DAG.getMachineFunction().getName()
-                      << " function use TLS-LD model for TLS IE/LD vars.\n");
-    Model = TLSModel::LocalDynamic;
-  } else if (FuncInfo->isAIXFuncUseTLSIE()) {
-    LLVM_DEBUG(dbgs() << DAG.getMachineFunction().getName()
-                      << " function use TLS-IE model for TLS IE/LD vars.\n");
-    Model = TLSModel::InitialExec;
-  }
-
   bool IsTLSLocalExecModel = Model == TLSModel::LocalExec;
 
   if (IsTLSLocalExecModel || Model == TLSModel::InitialExec) {
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h 
b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
index 03136743358ec0..df655a3be9512b 100644
--- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
@@ -150,11 +150,6 @@ class PPCFunctionInfo : public MachineFunctionInfo {
   /// to use SExt/ZExt flags in later optimization.
   std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
 
-  /// FIXME: Flags for heuristic.
-  bool AIXFuncUseTLSLD = false;
-  bool AIXFuncUseTLSIE = false;
-  bool AIXFuncUseInitDone = false;
-
 public:
   explicit PPCFunctionInfo(const Function &F, const TargetSubtargetInfo *STI);
 
@@ -226,13 +221,6 @@ class PPCFunctionInfo : public MachineFunctionInfo {
   void setHasFastCall() { HasFastCall = true; }
   bool hasFastCall() const { return HasFastCall;}
 
-  void setAIXFuncUseInitDone() { AIXFuncUseInitDone = true; }
-  bool isAIXFuncUseInitDone() const { return AIXFuncUseInitDone; }
-  void setAIXFuncUseTLSLD() { AIXFuncUseTLSLD = true; }
-  bool isAIXFuncUseTLSLD() const { return AIXFuncUseTLSLD; }
-  void setAIXFuncUseTLSIE() { AIXFuncUseTLSIE = true; }
-  bool isAIXFuncUseTLSIE() const { return AIXFuncUseTLSIE; }
-
   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
 
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
index d84f92b11c9781..ae41b6b1301064 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
@@ -636,8 +636,7 @@ entry:
 ; SMALL32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL:  L..C5:
-; SMALL32-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
-; SMALL32-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
+; SMALL32-NEXT:   .tc TIInit[TC],TIInit[TL]@ld
 ; SMALL32-LABEL:  L..C6:
 ; SMALL32-NEXT:   .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL32-LABEL:  L..C7:
@@ -655,8 +654,7 @@ entry:
 ; LARGE32-LABEL:  L..C3:
 ; LARGE32-NEXT:   .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL:  L..C4:
-; LARGE32-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
-; LARGE32-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
+; LARGE32-NEXT:   .tc TIInit[TE],TIInit[TL]@ld
 ; LARGE32-LABEL:  L..C5:
 ; LARGE32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -680,8 +678,7 @@ entry:
 ; SMALL64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C5:
-; SMALL64-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
-; SMALL64-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
+; SMALL64-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
 ; SMALL64-LABEL:  L..C6:
 ; SMALL64-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL64-LABEL:  L..C7:
@@ -702,8 +699,7 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C5:
-; LARGE64-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
-; LARGE64-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
+; LARGE64-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
 ; LARGE64-LABEL:  L..C6:
 ; LARGE64-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE64-LABEL:  L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
index f9567840a19651..bbb8e04b67b95e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
@@ -651,8 +651,7 @@ entry:
 ; SMALL32-NEXT:         .tc 
_Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:         .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL: L..C5:
-; SMALL32-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
-; SMALL32-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
+; SMALL32-NEXT:         .tc TIUninit[TC],TIUninit[UL]@ld
 ; SMALL32-LABEL: L..C6:
 ; SMALL32-NEXT:         .tc .TWUninit[TC],TWUninit[TL]@m
 ; SMALL32-LABEL: L..C7:
@@ -670,8 +669,7 @@ entry:
 ; LARGE32-LABEL: L..C3:
 ; LARGE32-NEXT:  .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
-; LARGE32-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
+; LARGE32-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
 ; LARGE32-LABEL: L..C5:
 ; LARGE32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -695,8 +693,7 @@ entry:
 ; SMALL64-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C5:
-; SMALL64-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
-; SMALL64-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
+; SMALL64-NEXT:   .tc TIUninit[TC],TIUninit[UL]@ld
 ; SMALL64-LABEL:  L..C6:
 ; SMALL64-NEXT:   .tc .TWUninit[TC],TWUninit[TL]@m
 ; SMALL64-LABEL:  L..C7:
@@ -717,8 +714,7 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C5:
-; LARGE64-NEXT:         .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
-; LARGE64-NEXT:         .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
+; LARGE64-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
 ; LARGE64-LABEL:  L..C6:
 ; LARGE64-NEXT:  .tc .TWUninit[TE],TWUninit[TL]@m
 ; LARGE64-LABEL:  L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
index 06937635bbd183..ff087a2144488c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
@@ -687,11 +687,9 @@ entry:
 ; SMALL32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL32-LABEL:  L..C3:
-; SMALL32-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
-; SMALL32-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
+; SMALL32-NEXT:  .tc TIUninit[TC],TIUninit[UL]@ld
 ; SMALL32-LABEL:  L..C4:
-; SMALL32-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
-; SMALL32-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
+; SMALL32-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
 ; SMALL32-LABEL:  L..C5:
 ; SMALL32-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL32-LABEL:  L..C6:
@@ -705,14 +703,12 @@ entry:
 ; LARGE32-LABEL:  L..C1:
 ; LARGE32-NEXT:  .tc TGInit[TE],TGInit[TL]@gd
 ; LARGE32-LABEL:  L..C2:
-; LARGE32-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
-; LARGE32-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
+; LARGE32-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
 ; LARGE32-LABEL:  L..C3:
 ; LARGE32-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE32-LABEL:  L..C4:
-; LARGE32-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
-; LARGE32-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
+; LARGE32-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
 ; LARGE32-LABEL:  L..C5:
 ; LARGE32-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE32-LABEL:  L..C6:
@@ -729,11 +725,9 @@ entry:
 ; SMALL64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL64-LABEL:  L..C3:
-; SMALL64-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
-; SMALL64-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
+; SMALL64-NEXT:  .tc TIUninit[TC],TIUninit[UL]@ld
 ; SMALL64-LABEL:  L..C4:
-; SMALL64-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
-; SMALL64-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
+; SMALL64-NEXT:  .tc TIInit[TC],TIInit[TL]@ld
 ; SMALL64-LABEL:  L..C5:
 ; SMALL64-NEXT:  .tc .TWInit[TC],TWInit[TL]@m
 ; SMALL64-LABEL:  L..C6:
@@ -750,11 +744,9 @@ entry:
 ; LARGE64-NEXT:  .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:  .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64-LABEL:  L..C3:
-; LARGE64-NEXT:  .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
-; LARGE64-NEXT:  .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
+; LARGE64-NEXT:  .tc TIUninit[TE],TIUninit[UL]@ld
 ; LARGE64-LABEL:  L..C4:
-; LARGE64-NEXT:  .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
-; LARGE64-NEXT:  .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
+; LARGE64-NEXT:  .tc TIInit[TE],TIInit[TL]@ld
 ; LARGE64-LABEL:  L..C5:
 ; LARGE64-NEXT:  .tc .TWInit[TE],TWInit[TL]@m
 ; LARGE64-LABEL:  L..C6:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
deleted file mode 100644
index d92375730a95a7..00000000000000
--- a/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
+++ /dev/null
@@ -1,362 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 4
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc64-ibm-aix-xcoff \
-; RUN:     --code-model=small < %s | FileCheck %s 
--check-prefixes=SMALL64,COMMON
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc64-ibm-aix-xcoff \
-; RUN:     --code-model=large < %s | FileCheck %s 
--check-prefixes=LARGE64,COMMON
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc-ibm-aix-xcoff \
-; RUN:     --code-model=small < %s | FileCheck %s 
--check-prefixes=SMALL32,COMMON
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple 
powerpc-ibm-aix-xcoff \
-; RUN:     --code-model=large < %s | FileCheck %s 
--check-prefixes=LARGE32,COMMON
-
-@_$TLSLD. = thread_local(localdynamic) global i32 42, align 4
-@_$TLSLD.a = thread_local(localdynamic) global i32 42, align 4
-@__$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
-@_$TLSLD._$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
-
-declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
-
-define i32 @loadSym1() {
-; SMALL64-LABEL: loadSym1:
-; SMALL64:       # %bb.0: # %entry
-; SMALL64-NEXT:    mflr 0
-; SMALL64-NEXT:    stdu 1, -48(1)
-; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL64-NEXT:    std 0, 64(1)
-; SMALL64-NEXT:    bla .__tls_get_mod[PR]
-; SMALL64-NEXT:    ld 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
-; SMALL64-NEXT:    lwzx 3, 3, 4
-; SMALL64-NEXT:    addi 1, 1, 48
-; SMALL64-NEXT:    ld 0, 16(1)
-; SMALL64-NEXT:    mtlr 0
-; SMALL64-NEXT:    blr
-;
-; LARGE64-LABEL: loadSym1:
-; LARGE64:       # %bb.0: # %entry
-; LARGE64-NEXT:    mflr 0
-; LARGE64-NEXT:    stdu 1, -48(1)
-; LARGE64-NEXT:    addis 3, L..C0@u(2)
-; LARGE64-NEXT:    addis 6, L..C1@u(2)
-; LARGE64-NEXT:    std 0, 64(1)
-; LARGE64-NEXT:    ld 3, L..C0@l(3)
-; LARGE64-NEXT:    bla .__tls_get_mod[PR]
-; LARGE64-NEXT:    ld 4, L..C1@l(6)
-; LARGE64-NEXT:    lwzx 3, 3, 4
-; LARGE64-NEXT:    addi 1, 1, 48
-; LARGE64-NEXT:    ld 0, 16(1)
-; LARGE64-NEXT:    mtlr 0
-; LARGE64-NEXT:    blr
-;
-; SMALL32-LABEL: loadSym1:
-; SMALL32:       # %bb.0: # %entry
-; SMALL32-NEXT:    mflr 0
-; SMALL32-NEXT:    stwu 1, -32(1)
-; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL32-NEXT:    stw 0, 40(1)
-; SMALL32-NEXT:    bla .__tls_get_mod[PR]
-; SMALL32-NEXT:    lwz 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
-; SMALL32-NEXT:    lwzx 3, 3, 4
-; SMALL32-NEXT:    addi 1, 1, 32
-; SMALL32-NEXT:    lwz 0, 8(1)
-; SMALL32-NEXT:    mtlr 0
-; SMALL32-NEXT:    blr
-;
-; LARGE32-LABEL: loadSym1:
-; LARGE32:       # %bb.0: # %entry
-; LARGE32-NEXT:    mflr 0
-; LARGE32-NEXT:    stwu 1, -32(1)
-; LARGE32-NEXT:    stw 0, 40(1)
-; LARGE32-NEXT:    addis 6, L..C0@u(2)
-; LARGE32-NEXT:    addis 3, L..C1@u(2)
-; LARGE32-NEXT:    lwz 3, L..C1@l(3)
-; LARGE32-NEXT:    bla .__tls_get_mod[PR]
-; LARGE32-NEXT:    lwz 4, L..C0@l(6)
-; LARGE32-NEXT:    lwzx 3, 3, 4
-; LARGE32-NEXT:    addi 1, 1, 32
-; LARGE32-NEXT:    lwz 0, 8(1)
-; LARGE32-NEXT:    mtlr 0
-; LARGE32-NEXT:    blr
-entry:
-  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD.)
-  %1 = load i32, ptr %0, align 4
-  ret i32 %1
-}
-
-define i32 @loadSym2() {
-; SMALL64-LABEL: loadSym2:
-; SMALL64:       # %bb.0: # %entry
-; SMALL64-NEXT:    mflr 0
-; SMALL64-NEXT:    stdu 1, -48(1)
-; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL64-NEXT:    std 0, 64(1)
-; SMALL64-NEXT:    bla .__tls_get_mod[PR]
-; SMALL64-NEXT:    ld 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
-; SMALL64-NEXT:    lwzx 3, 3, 4
-; SMALL64-NEXT:    addi 1, 1, 48
-; SMALL64-NEXT:    ld 0, 16(1)
-; SMALL64-NEXT:    mtlr 0
-; SMALL64-NEXT:    blr
-;
-; LARGE64-LABEL: loadSym2:
-; LARGE64:       # %bb.0: # %entry
-; LARGE64-NEXT:    mflr 0
-; LARGE64-NEXT:    stdu 1, -48(1)
-; LARGE64-NEXT:    addis 3, L..C0@u(2)
-; LARGE64-NEXT:    addis 6, L..C2@u(2)
-; LARGE64-NEXT:    std 0, 64(1)
-; LARGE64-NEXT:    ld 3, L..C0@l(3)
-; LARGE64-NEXT:    bla .__tls_get_mod[PR]
-; LARGE64-NEXT:    ld 4, L..C2@l(6)
-; LARGE64-NEXT:    lwzx 3, 3, 4
-; LARGE64-NEXT:    addi 1, 1, 48
-; LARGE64-NEXT:    ld 0, 16(1)
-; LARGE64-NEXT:    mtlr 0
-; LARGE64-NEXT:    blr
-;
-; SMALL32-LABEL: loadSym2:
-; SMALL32:       # %bb.0: # %entry
-; SMALL32-NEXT:    mflr 0
-; SMALL32-NEXT:    stwu 1, -32(1)
-; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL32-NEXT:    stw 0, 40(1)
-; SMALL32-NEXT:    bla .__tls_get_mod[PR]
-; SMALL32-NEXT:    lwz 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
-; SMALL32-NEXT:    lwzx 3, 3, 4
-; SMALL32-NEXT:    addi 1, 1, 32
-; SMALL32-NEXT:    lwz 0, 8(1)
-; SMALL32-NEXT:    mtlr 0
-; SMALL32-NEXT:    blr
-;
-; LARGE32-LABEL: loadSym2:
-; LARGE32:       # %bb.0: # %entry
-; LARGE32-NEXT:    mflr 0
-; LARGE32-NEXT:    stwu 1, -32(1)
-; LARGE32-NEXT:    stw 0, 40(1)
-; LARGE32-NEXT:    addis 6, L..C2@u(2)
-; LARGE32-NEXT:    addis 3, L..C1@u(2)
-; LARGE32-NEXT:    lwz 3, L..C1@l(3)
-; LARGE32-NEXT:    bla .__tls_get_mod[PR]
-; LARGE32-NEXT:    lwz 4, L..C2@l(6)
-; LARGE32-NEXT:    lwzx 3, 3, 4
-; LARGE32-NEXT:    addi 1, 1, 32
-; LARGE32-NEXT:    lwz 0, 8(1)
-; LARGE32-NEXT:    mtlr 0
-; LARGE32-NEXT:    blr
-entry:
-  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD.a)
-  %1 = load i32, ptr %0, align 4
-  ret i32 %1
-}
-
-define i32 @loadSym3() {
-; SMALL64-LABEL: loadSym3:
-; SMALL64:       # %bb.0: # %entry
-; SMALL64-NEXT:    mflr 0
-; SMALL64-NEXT:    stdu 1, -48(1)
-; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL64-NEXT:    std 0, 64(1)
-; SMALL64-NEXT:    bla .__tls_get_mod[PR]
-; SMALL64-NEXT:    ld 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
-; SMALL64-NEXT:    lwzx 3, 3, 4
-; SMALL64-NEXT:    addi 1, 1, 48
-; SMALL64-NEXT:    ld 0, 16(1)
-; SMALL64-NEXT:    mtlr 0
-; SMALL64-NEXT:    blr
-;
-; LARGE64-LABEL: loadSym3:
-; LARGE64:       # %bb.0: # %entry
-; LARGE64-NEXT:    mflr 0
-; LARGE64-NEXT:    stdu 1, -48(1)
-; LARGE64-NEXT:    addis 3, L..C0@u(2)
-; LARGE64-NEXT:    addis 6, L..C3@u(2)
-; LARGE64-NEXT:    std 0, 64(1)
-; LARGE64-NEXT:    ld 3, L..C0@l(3)
-; LARGE64-NEXT:    bla .__tls_get_mod[PR]
-; LARGE64-NEXT:    ld 4, L..C3@l(6)
-; LARGE64-NEXT:    lwzx 3, 3, 4
-; LARGE64-NEXT:    addi 1, 1, 48
-; LARGE64-NEXT:    ld 0, 16(1)
-; LARGE64-NEXT:    mtlr 0
-; LARGE64-NEXT:    blr
-;
-; SMALL32-LABEL: loadSym3:
-; SMALL32:       # %bb.0: # %entry
-; SMALL32-NEXT:    mflr 0
-; SMALL32-NEXT:    stwu 1, -32(1)
-; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL32-NEXT:    stw 0, 40(1)
-; SMALL32-NEXT:    bla .__tls_get_mod[PR]
-; SMALL32-NEXT:    lwz 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
-; SMALL32-NEXT:    lwzx 3, 3, 4
-; SMALL32-NEXT:    addi 1, 1, 32
-; SMALL32-NEXT:    lwz 0, 8(1)
-; SMALL32-NEXT:    mtlr 0
-; SMALL32-NEXT:    blr
-;
-; LARGE32-LABEL: loadSym3:
-; LARGE32:       # %bb.0: # %entry
-; LARGE32-NEXT:    mflr 0
-; LARGE32-NEXT:    stwu 1, -32(1)
-; LARGE32-NEXT:    stw 0, 40(1)
-; LARGE32-NEXT:    addis 6, L..C3@u(2)
-; LARGE32-NEXT:    addis 3, L..C1@u(2)
-; LARGE32-NEXT:    lwz 3, L..C1@l(3)
-; LARGE32-NEXT:    bla .__tls_get_mod[PR]
-; LARGE32-NEXT:    lwz 4, L..C3@l(6)
-; LARGE32-NEXT:    lwzx 3, 3, 4
-; LARGE32-NEXT:    addi 1, 1, 32
-; LARGE32-NEXT:    lwz 0, 8(1)
-; LARGE32-NEXT:    mtlr 0
-; LARGE32-NEXT:    blr
-entry:
-  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@__$TLSLD.)
-  %1 = load i32, ptr %0, align 4
-  ret i32 %1
-}
-
-define i32 @loadSym4() {
-; SMALL64-LABEL: loadSym4:
-; SMALL64:       # %bb.0: # %entry
-; SMALL64-NEXT:    mflr 0
-; SMALL64-NEXT:    stdu 1, -48(1)
-; SMALL64-NEXT:    ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL64-NEXT:    std 0, 64(1)
-; SMALL64-NEXT:    bla .__tls_get_mod[PR]
-; SMALL64-NEXT:    ld 4, L..C4(2) # target-flags(ppc-tlsld) @"_$TLSLD._$TLSLD."
-; SMALL64-NEXT:    lwzx 3, 3, 4
-; SMALL64-NEXT:    addi 1, 1, 48
-; SMALL64-NEXT:    ld 0, 16(1)
-; SMALL64-NEXT:    mtlr 0
-; SMALL64-NEXT:    blr
-;
-; LARGE64-LABEL: loadSym4:
-; LARGE64:       # %bb.0: # %entry
-; LARGE64-NEXT:    mflr 0
-; LARGE64-NEXT:    stdu 1, -48(1)
-; LARGE64-NEXT:    addis 3, L..C0@u(2)
-; LARGE64-NEXT:    addis 6, L..C4@u(2)
-; LARGE64-NEXT:    std 0, 64(1)
-; LARGE64-NEXT:    ld 3, L..C0@l(3)
-; LARGE64-NEXT:    bla .__tls_get_mod[PR]
-; LARGE64-NEXT:    ld 4, L..C4@l(6)
-; LARGE64-NEXT:    lwzx 3, 3, 4
-; LARGE64-NEXT:    addi 1, 1, 48
-; LARGE64-NEXT:    ld 0, 16(1)
-; LARGE64-NEXT:    mtlr 0
-; LARGE64-NEXT:    blr
-;
-; SMALL32-LABEL: loadSym4:
-; SMALL32:       # %bb.0: # %entry
-; SMALL32-NEXT:    mflr 0
-; SMALL32-NEXT:    stwu 1, -32(1)
-; SMALL32-NEXT:    lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
-; SMALL32-NEXT:    stw 0, 40(1)
-; SMALL32-NEXT:    bla .__tls_get_mod[PR]
-; SMALL32-NEXT:    lwz 4, L..C4(2) # target-flags(ppc-tlsld) 
@"_$TLSLD._$TLSLD."
-; SMALL32-NEXT:    lwzx 3, 3, 4
-; SMALL32-NEXT:    addi 1, 1, 32
-; SMALL32-NEXT:    lwz 0, 8(1)
-; SMALL32-NEXT:    mtlr 0
-; SMALL32-NEXT:    blr
-;
-; LARGE32-LABEL: loadSym4:
-; LARGE32:       # %bb.0: # %entry
-; LARGE32-NEXT:    mflr 0
-; LARGE32-NEXT:    stwu 1, -32(1)
-; LARGE32-NEXT:    stw 0, 40(1)
-; LARGE32-NEXT:    addis 6, L..C4@u(2)
-; LARGE32-NEXT:    addis 3, L..C1@u(2)
-; LARGE32-NEXT:    lwz 3, L..C1@l(3)
-; LARGE32-NEXT:    bla .__tls_get_mod[PR]
-; LARGE32-NEXT:    lwz 4, L..C4@l(6)
-; LARGE32-NEXT:    lwzx 3, 3, 4
-; LARGE32-NEXT:    addi 1, 1, 32
-; LARGE32-NEXT:    lwz 0, 8(1)
-; LARGE32-NEXT:    mtlr 0
-; LARGE32-NEXT:    blr
-entry:
-  %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 
@_$TLSLD._$TLSLD.)
-  %1 = load i32, ptr %0, align 4
-  ret i32 %1
-}
-
-; COMMON:      .csect _Renamed..5f24__TLSLD.[TL],2
-; COMMON-NEXT: .globl  _Renamed..5f24__TLSLD.[TL]      # @"_$TLSLD."
-; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.[TL],"_$TLSLD."
-; COMMON:      .csect _Renamed..5f24__TLSLD.a[TL],2
-; COMMON-NEXT: .globl  _Renamed..5f24__TLSLD.a[TL]     # @"_$TLSLD.a"
-; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.a[TL],"_$TLSLD.a"
-; COMMON:      .csect _Renamed..5f5f24___TLSLD.[TL],2
-; COMMON-NEXT: .lglobl _Renamed..5f5f24___TLSLD.[TL]   # @"__$TLSLD."
-; COMMON-NEXT: .rename _Renamed..5f5f24___TLSLD.[TL],"__$TLSLD."
-; COMMON:      .csect _Renamed..5f245f24__TLSLD.__TLSLD.[TL],2
-; COMMON-NEXT: .lglobl _Renamed..5f245f24__TLSLD.__TLSLD.[TL] # 
@"_$TLSLD._$TLSLD."
-; COMMON-NEXT: .rename 
_Renamed..5f245f24__TLSLD.__TLSLD.[TL],"_$TLSLD._$TLSLD."
-
-; SMALL64-LABEL: .toc
-; SMALL64-LABEL: L..C0:
-; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
-; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
-; SMALL64-LABEL: L..C1:
-; SMALL64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
-; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
-; SMALL64-LABEL: L..C2:
-; SMALL64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
-; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
-; SMALL64-LABEL: L..C3:
-; SMALL64-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
-; SMALL64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
-; SMALL64-LABEL: L..C4:
-; SMALL64-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
-; SMALL64-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
-
-; LARGE64-LABEL: .toc
-; LARGE64-LABEL: L..C0:
-; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
-; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
-; LARGE64-LABEL: L..C1:
-; LARGE64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
-; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
-; LARGE64-LABEL: L..C2:
-; LARGE64-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
-; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
-; LARGE64-LABEL: L..C3:
-; LARGE64-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
-; LARGE64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
-; LARGE64-LABEL: L..C4:
-; LARGE64-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
-; LARGE64-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
-
-; SMALL32-LABEL: .toc
-; SMALL32-LABEL: L..C0:
-; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
-; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
-; SMALL32-LABEL: L..C1:
-; SMALL32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
-; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
-; SMALL32-LABEL: L..C2:
-; SMALL32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
-; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
-; SMALL32-LABEL: L..C3:
-; SMALL32-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
-; SMALL32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
-; SMALL32-LABEL: L..C4:
-; SMALL32-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
-; SMALL32-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
-
-; LARGE32-LABEL: .toc
-; LARGE32-LABEL: L..C0:
-; LARGE32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
-; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
-; LARGE32-LABEL: L..C1:
-; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
-; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
-; LARGE32-LABEL: L..C2:
-; LARGE32-NEXT: .tc 
_Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
-; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
-; LARGE32-LABEL: L..C3:
-; LARGE32-NEXT: .tc 
_Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
-; LARGE32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
-; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT: .tc 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
-; LARGE32-NEXT: .rename 
_Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
-
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll 
b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
index d5dc7e57d36328..22349337f18908 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
@@ -358,52 +358,39 @@ entry:
 ; SMALL-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; SMALL-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; SMALL:        [[TGInitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TC],TGInit[TL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TC],"TGInit"
+; SMALL-NEXT:   .tc TGInit[TC],TGInit[TL]@ld
 ; SMALL:        [[TGUninitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TGUninit[TC],TGUninit[TL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TGUninit[TC],"TGUninit"
+; SMALL-NEXT:   .tc TGUninit[TC],TGUninit[TL]@ld
 ; SMALL:        [[TIInitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
+; SMALL-NEXT:   .tc TIInit[TC],TIInit[TL]@ld
 ; SMALL:        [[TIUninitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
+; SMALL-NEXT:   .tc TIUninit[TC],TIUninit[UL]@ld
 ; SMALL:        [[TWInitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TWInit[TC],TWInit[TL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TWInit[TC],"TWInit"
+; SMALL-NEXT:   .tc TWInit[TC],TWInit[TL]@ld
 ; SMALL:        [[TWUninitL]]:
-; SMALL-NEXT:   .tc _Renamed..5f24__TLSLD.TWUninit[TC],TWUninit[TL]@ld
-; SMALL-NEXT:   .rename _Renamed..5f24__TLSLD.TWUninit[TC],"TWUninit"
+; SMALL-NEXT:   .tc TWUninit[TC],TWUninit[TL]@ld
 
 ; LARGE64:        [[ModuleHandleL]]:
 ; LARGE64-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE64-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ; LARGE64:        [[TGInitL]]:
-; LARGE64-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
-; LARGE64-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
+; LARGE64-NEXT:   .tc TGInit[TE],TGInit[TL]@ld
 ;
 ; LARGE32:        [[TGInitL]]:
-; LARGE32-NEXT:   .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
-; LARGE32-NEXT:   .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
+; LARGE32-NEXT:   .tc TGInit[TE],TGInit[TL]@ld
 ; LARGE32:        [[ModuleHandleL]]:
 ; LARGE32-NEXT:   .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
 ; LARGE32-NEXT:   .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
 ;
 ; LARGE:        [[TGUninitL]]:
-; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TGUninit[TE],TGUninit[TL]@ld
-; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TGUninit[TE],"TGUninit"
+; LARGE-NEXT:   .tc TGUninit[TE],TGUninit[TL]@ld
 ; LARGE:        [[TIInitL]]:
-; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
-; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
+; LARGE-NEXT:   .tc TIInit[TE],TIInit[TL]@ld
 ; LARGE:        [[TIUninitL]]:
-; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
-; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
+; LARGE-NEXT:   .tc TIUninit[TE],TIUninit[UL]@ld
 ; LARGE:        [[TWInitL]]:
-; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TWInit[TE],TWInit[TL]@ld
-; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TWInit[TE],"TWInit"
+; LARGE-NEXT:   .tc TWInit[TE],TWInit[TL]@ld
 ; LARGE:        [[TWUninitL]]:
-; LARGE-NEXT:   .tc _Renamed..5f24__TLSLD.TWUninit[TE],TWUninit[TL]@ld
-; LARGE-NEXT:   .rename _Renamed..5f24__TLSLD.TWUninit[TE],"TWUninit"
+; LARGE-NEXT:   .tc TWUninit[TE],TWUninit[TL]@ld
 
 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)

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