github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 437fcc6eed99694a9f9486d29ead6a3d3275ede9
a74a9bbd2ff2c6589db4c9756cf809c22e98fa64 --
clang/lib/Driver/ToolChains/Arch/Mips.cpp clang/test/Driver/mips-features.c
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsSEISelLowering.cpp
llvm/lib/Target/Mips/MipsSubtarget.cpp llvm/lib/Target/Mips/MipsSubtarget.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp
b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 0a0d40751f..e089eb79e1 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -366,11 +366,11 @@ MipsTargetLowering::MipsTargetLowering(const
MipsTargetMachine &TM,
setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
setOperationAction(ISD::SELECT, MVT::i64, Custom);
if (Subtarget.hasMips64r6()) {
- setOperationAction(ISD::LOAD, MVT::i64, Legal);
- setOperationAction(ISD::STORE, MVT::i64, Legal);
+ setOperationAction(ISD::LOAD, MVT::i64, Legal);
+ setOperationAction(ISD::STORE, MVT::i64, Legal);
} else {
- setOperationAction(ISD::LOAD, MVT::i64, Custom);
- setOperationAction(ISD::STORE, MVT::i64, Custom);
+ setOperationAction(ISD::LOAD, MVT::i64, Custom);
+ setOperationAction(ISD::STORE, MVT::i64, Custom);
}
setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom);
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
index 5c8d64e3b6..ebaf0746d6 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -198,11 +198,11 @@ MipsSETargetLowering::MipsSETargetLowering(const
MipsTargetMachine &TM,
setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom);
if (Subtarget.hasMips32r6()) {
- setOperationAction(ISD::LOAD, MVT::i32, Legal);
- setOperationAction(ISD::STORE, MVT::i32, Legal);
+ setOperationAction(ISD::LOAD, MVT::i32, Legal);
+ setOperationAction(ISD::STORE, MVT::i32, Legal);
} else {
- setOperationAction(ISD::LOAD, MVT::i32, Custom);
- setOperationAction(ISD::STORE, MVT::i32, Custom);
+ setOperationAction(ISD::LOAD, MVT::i32, Custom);
+ setOperationAction(ISD::STORE, MVT::i32, Custom);
}
setTargetDAGCombine(ISD::MUL);
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp
b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index 29b277f5f3..3c67d156a6 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -79,11 +79,11 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef
CPU, StringRef FS,
HasMips3_32(false), HasMips3_32r2(false), HasMips4_32(false),
HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false),
HasDSP(false),
- HasDSPR2(false), HasDSPR3(false), AllowMixed16_32(Mixed16_32 ||
Mips_Os16),
- Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasSym32(false),
- HasEVA(false), DisableMadd4(false), HasMT(false), HasCRC(false),
- HasVirt(false), HasGINV(false), UseIndirectJumpsHazard(false),
- NoUnalignedAccess(false),
+ HasDSPR2(false), HasDSPR3(false),
+ AllowMixed16_32(Mixed16_32 || Mips_Os16), Os16(Mips_Os16), HasMSA(false),
+ UseTCCInDIV(false), HasSym32(false), HasEVA(false), DisableMadd4(false),
+ HasMT(false), HasCRC(false), HasVirt(false), HasGINV(false),
+ UseIndirectJumpsHazard(false), NoUnalignedAccess(false),
StackAlignOverride(StackAlignOverride), TM(TM), TargetTriple(TT),
TSInfo(), InstrInfo(MipsInstrInfo::create(
initializeSubtargetDependencies(CPU, FS, TM))),
``````````
</details>
https://github.com/llvm/llvm-project/pull/85174
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