Author: Alexandros Lamprineas Date: 2024-03-07T10:33:26Z New Revision: 6f54a54c6f5f644b4f4c79882154fd9737568c8e
URL: https://github.com/llvm/llvm-project/commit/6f54a54c6f5f644b4f4c79882154fd9737568c8e DIFF: https://github.com/llvm/llvm-project/commit/6f54a54c6f5f644b4f4c79882154fd9737568c8e.diff LOG: [FMV] Remove duplicate features from mangled name. (#84165) ACLE suggests: https://github.com/ARM-software/acle/pull/308. GCC emits diagnostics for attribute strings which contain duplicate features, but for now let's follow the SPEC in regards to mangling rules and we can change the semantic behavior of the compiler later if there's value to it. Added: Modified: clang/lib/CodeGen/Targets/AArch64.cpp clang/test/CodeGen/attr-target-version.c Removed: ################################################################################ diff --git a/clang/lib/CodeGen/Targets/AArch64.cpp b/clang/lib/CodeGen/Targets/AArch64.cpp index 725e8a70fddfe6..85117366de0ee8 100644 --- a/clang/lib/CodeGen/Targets/AArch64.cpp +++ b/clang/lib/CodeGen/Targets/AArch64.cpp @@ -886,9 +886,11 @@ void AArch64ABIInfo::appendAttributeMangling(StringRef AttrStr, return LHS.compare(RHS) < 0; }); + llvm::SmallDenseSet<StringRef, 8> UniqueFeats; for (auto &Feat : Features) if (auto Ext = llvm::AArch64::parseArchExtension(Feat)) - Out << 'M' << Ext->Name; + if (UniqueFeats.insert(Ext->Name).second) + Out << 'M' << Ext->Name; } std::unique_ptr<TargetCodeGenInfo> diff --git a/clang/test/CodeGen/attr-target-version.c b/clang/test/CodeGen/attr-target-version.c index ae1a8772f6cc07..b7112c783da913 100644 --- a/clang/test/CodeGen/attr-target-version.c +++ b/clang/test/CodeGen/attr-target-version.c @@ -273,7 +273,7 @@ int hoo(void) { // CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]] // CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] // CHECK: resolver_return: -// CHECK-NEXT: ret ptr @fmv_inline._MfcmaMfp16Mfp16MrdmMsme +// CHECK-NEXT: ret ptr @fmv_inline._MfcmaMfp16MrdmMsme // CHECK: resolver_else: // CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8 // CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064 @@ -582,7 +582,7 @@ int hoo(void) { // // // CHECK: Function Attrs: noinline nounwind optnone -// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16MrdmMsme +// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16MrdmMsme // CHECK-SAME: () #[[ATTR13:[0-9]+]] { // CHECK-NEXT: entry: // CHECK-NEXT: ret i32 2 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
