================
@@ -1,61 +1,111 @@
-; All of these ands and shifts should be folded into rlwimi's
-; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o %t
-; RUN: not grep and %t
-; RUN: not grep srawi %t
-; RUN: not grep srwi %t
-; RUN: not grep slwi %t
-; RUN: grep rlwinm %t | count 8
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu |
FileCheck %s
define i32 @test1(i32 %a) {
+; CHECK-LABEL: test1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rlwinm 3, 3, 0, 4, 19
+; CHECK-NEXT: blr
entry:
- %tmp.1 = and i32 %a, 268431360 ; <i32> [#uses=1]
- ret i32 %tmp.1
+ %tmp.1 = and i32 %a, 268431360
+ ret i32 %tmp.1
}
define i32 @test2(i32 %a) {
+; CHECK-LABEL: test2:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicl 3, 3, 36, 24
+; CHECK-NEXT: rldicl 3, 3, 28, 32
----------------
ecnelises wrote:
`rlwinm` is a 32-bit instruction, in 64-bit mode both the input arg and return
values are sign-extended. `rldicl` here does more stuff including
sign-extending it (so here we see no `extsw` exists)
https://github.com/llvm/llvm-project/pull/82968
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