================ @@ -355,6 +356,18 @@ class SICacheControl { MachineBasicBlock::iterator &MI) const { return false; } + +public: + // The following is for supporting precise memory mode. When the option + // amdgpu-precise-memory is enabled, an s_waitcnt instruction is inserted + // after each memory instruction. + + virtual bool + handleNonAtomicForPreciseMemory(MachineBasicBlock::iterator &MI) = 0; + /// Handles atomic instruction \p MI with \p IsAtomicWithRet indicating + /// whether \p MI returns a result. ---------------- Pierre-vh wrote:
IMO the comment isn't needed, I think the function's name describes it well enough (and the comment just before adds enough context), the comment just rephrases the function + argument names https://github.com/llvm/llvm-project/pull/79236 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits