llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang-codegen @llvm/pr-subscribers-clang Author: Prabhuk (Prabhuk) <details> <summary>Changes</summary> This reverts commit 9cc98e336980f00cbafcbed8841344e6ac472bdc. Issue: https://github.com/ClangBuiltLinux/linux/issues/1997 --- Patch is 32.03 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/82032.diff 16 Files Affected: - (modified) clang/include/clang/Basic/DiagnosticCommonKinds.td (-2) - (modified) clang/include/clang/Basic/DiagnosticSemaKinds.td (-2) - (modified) clang/include/clang/Basic/TargetInfo.h (-8) - (modified) clang/lib/Basic/TargetInfo.cpp (-1) - (modified) clang/lib/Basic/Targets.cpp (-1) - (modified) clang/lib/Basic/Targets/AArch64.cpp (+2-23) - (modified) clang/lib/Basic/Targets/AArch64.h (-3) - (modified) clang/lib/CodeGen/CodeGenModule.cpp (-2) - (modified) clang/lib/CodeGen/TargetInfo.h (-1) - (modified) clang/lib/CodeGen/Targets/AArch64.cpp (+5-12) - (modified) clang/lib/Sema/Sema.cpp (-34) - (removed) clang/test/CodeGen/aarch64-soft-float-abi.c (-56) - (modified) clang/test/CodeGen/attr-target-clones-aarch64.c (+18-18) - (modified) clang/test/Preprocessor/aarch64-target-features.c (+3-3) - (removed) clang/test/Sema/aarch64-soft-float-abi.c (-54) - (removed) llvm/test/CodeGen/AArch64/soft-float-abi.ll (-161) ``````````diff diff --git a/clang/include/clang/Basic/DiagnosticCommonKinds.td b/clang/include/clang/Basic/DiagnosticCommonKinds.td index 43e132e5665850..08bb1d81ba29f1 100644 --- a/clang/include/clang/Basic/DiagnosticCommonKinds.td +++ b/clang/include/clang/Basic/DiagnosticCommonKinds.td @@ -356,8 +356,6 @@ def warn_target_unrecognized_env : Warning< def warn_knl_knm_isa_support_removed : Warning< "KNL, KNM related Intel Xeon Phi CPU's specific ISA's supports will be removed in LLVM 19.">, InGroup<DiagGroup<"knl-knm-isa-support-removed">>; -def err_target_unsupported_abi_with_fpu : Error< - "'%0' ABI is not supported with FPU">; // Source manager def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal; diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td index fb44495199ee56..6e3cebc311eeb9 100644 --- a/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -11314,8 +11314,6 @@ def err_omp_wrong_dependency_iterator_type : Error< def err_target_unsupported_type : Error<"%0 requires %select{|%2 bit size}1 %3 %select{|return }4type support," " but target '%5' does not support it">; -def err_target_unsupported_type_for_abi - : Error<"%0 requires %1 type support, but ABI '%2' does not support it">; def err_omp_lambda_capture_in_declare_target_not_to : Error< "variable captured in declare target region must appear in a to clause">; def err_omp_device_type_mismatch : Error< diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 2f80234c0dc7e3..48e9cec482755c 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -231,7 +231,6 @@ class TargetInfo : public TransferrableTargetInfo, bool HasIbm128; bool HasLongDouble; bool HasFPReturn; - bool HasFPTypes; bool HasStrictFP; unsigned char MaxAtomicPromoteWidth, MaxAtomicInlineWidth; @@ -690,9 +689,6 @@ class TargetInfo : public TransferrableTargetInfo, /// on this target. virtual bool hasFPReturn() const { return HasFPReturn; } - /// Determine whether floating point types are supported for this target. - virtual bool hasFPTypes() const { return HasFPTypes; } - /// Determine whether constrained floating point is supported on this target. virtual bool hasStrictFP() const { return HasStrictFP; } @@ -1335,10 +1331,6 @@ class TargetInfo : public TransferrableTargetInfo, return false; } - /// Make changes to the supported types which depend on both the target - /// features and ABI. - virtual void setSupportedArgTypes() {} - /// Use the specified unit for FP math. /// /// \return False on error (invalid unit name). diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp index 08fb0f2bb1bad6..96b3ad9ba2f273 100644 --- a/clang/lib/Basic/TargetInfo.cpp +++ b/clang/lib/Basic/TargetInfo.cpp @@ -67,7 +67,6 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) { HasFullBFloat16 = false; HasLongDouble = true; HasFPReturn = true; - HasFPTypes = true; HasStrictFP = false; PointerWidth = PointerAlign = 32; BoolWidth = BoolAlign = 8; diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 577564902453ae..e3283510c6aac7 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -830,7 +830,6 @@ TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, Target->setSupportedOpenCLOpts(); Target->setCommandLineOpenCLOpts(); Target->setMaxAtomicWidth(); - Target->setSupportedArgTypes(); if (!Opts->DarwinTargetVariantTriple.empty()) Target->DarwinTargetVariantTriple = diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index c49461bd20eeec..dd0218e6ebed81 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -11,7 +11,6 @@ //===----------------------------------------------------------------------===// #include "AArch64.h" -#include "clang/Basic/Diagnostic.h" #include "clang/Basic/LangOptions.h" #include "clang/Basic/TargetBuiltins.h" #include "clang/Basic/TargetInfo.h" @@ -200,32 +199,13 @@ AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple &Triple, StringRef AArch64TargetInfo::getABI() const { return ABI; } bool AArch64TargetInfo::setABI(const std::string &Name) { - if (Name != "aapcs" && Name != "aapcs-soft" && Name != "darwinpcs") + if (Name != "aapcs" && Name != "darwinpcs") return false; ABI = Name; return true; } -void AArch64TargetInfo::setSupportedArgTypes() { - if (!(FPU & FPUMode) && ABI != "aapcs-soft") { - // When a hard-float ABI is used on a target without an FPU, all - // floating-point argument and return types are rejected because they must - // be passed in FP registers. - HasFPTypes = false; - } -} - -bool AArch64TargetInfo::validateTarget(DiagnosticsEngine &Diags) const { - if (hasFeature("fp") && ABI == "aapcs-soft") { - // aapcs-soft is not allowed for targets with an FPU, to avoid there being - // two incomatible ABIs. - Diags.Report(diag::err_target_unsupported_abi_with_fpu) << ABI; - return false; - } - return true; -} - bool AArch64TargetInfo::validateBranchProtection(StringRef Spec, StringRef, BranchProtectionInfo &BPI, StringRef &Err) const { @@ -706,8 +686,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { return llvm::StringSwitch<bool>(Feature) .Cases("aarch64", "arm64", "arm", true) .Case("fmv", HasFMV) - .Case("fp", FPU & FPUMode) - .Cases("neon", "simd", FPU & NeonMode) + .Cases("neon", "fp", "simd", FPU & NeonMode) .Case("jscvt", HasJSCVT) .Case("fcma", HasFCMA) .Case("rng", HasRandGen) diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index f4ec3543f4082c..26ee7fa1978256 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -96,7 +96,6 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { StringRef getABI() const override; bool setABI(const std::string &Name) override; - void setSupportedArgTypes() override; bool validateBranchProtection(StringRef Spec, StringRef Arch, BranchProtectionInfo &BPI, @@ -200,8 +199,6 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool hasInt128Type() const override; bool hasBitIntType() const override { return true; } - - bool validateTarget(DiagnosticsEngine &Diags) const override; }; class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo { diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp index 64836f8d174710..c984260b082cd1 100644 --- a/clang/lib/CodeGen/CodeGenModule.cpp +++ b/clang/lib/CodeGen/CodeGenModule.cpp @@ -145,8 +145,6 @@ createTargetCodeGenInfo(CodeGenModule &CGM) { Kind = AArch64ABIKind::DarwinPCS; else if (Triple.isOSWindows()) return createWindowsAArch64TargetCodeGenInfo(CGM, AArch64ABIKind::Win64); - else if (Target.getABI() == "aapcs-soft") - Kind = AArch64ABIKind::AAPCSSoft; return createAArch64TargetCodeGenInfo(CGM, Kind); } diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h index 0571e828bb1d4a..7682f197041c74 100644 --- a/clang/lib/CodeGen/TargetInfo.h +++ b/clang/lib/CodeGen/TargetInfo.h @@ -416,7 +416,6 @@ enum class AArch64ABIKind { AAPCS = 0, DarwinPCS, Win64, - AAPCSSoft, }; std::unique_ptr<TargetCodeGenInfo> diff --git a/clang/lib/CodeGen/Targets/AArch64.cpp b/clang/lib/CodeGen/Targets/AArch64.cpp index 81c1b29187ed96..ee7f95084d2e0b 100644 --- a/clang/lib/CodeGen/Targets/AArch64.cpp +++ b/clang/lib/CodeGen/Targets/AArch64.cpp @@ -53,8 +53,8 @@ class AArch64ABIInfo : public ABIInfo { Address EmitDarwinVAArg(Address VAListAddr, QualType Ty, CodeGenFunction &CGF) const; - Address EmitAAPCSVAArg(Address VAListAddr, QualType Ty, CodeGenFunction &CGF, - AArch64ABIKind Kind) const; + Address EmitAAPCSVAArg(Address VAListAddr, QualType Ty, + CodeGenFunction &CGF) const; Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty) const override { @@ -65,7 +65,7 @@ class AArch64ABIInfo : public ABIInfo { return Kind == AArch64ABIKind::Win64 ? EmitMSVAArg(CGF, VAListAddr, Ty) : isDarwinPCS() ? EmitDarwinVAArg(VAListAddr, Ty, CGF) - : EmitAAPCSVAArg(VAListAddr, Ty, CGF, Kind); + : EmitAAPCSVAArg(VAListAddr, Ty, CGF); } Address EmitMSVAArg(CodeGenFunction &CGF, Address VAListAddr, @@ -482,11 +482,6 @@ bool AArch64SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, } bool AArch64ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { - // For the soft-float ABI variant, no types are considered to be homogeneous - // aggregates. - if (Kind == AArch64ABIKind::AAPCSSoft) - return false; - // Homogeneous aggregates for AAPCS64 must have base types of a floating // point type or a short-vector type. This is the same as the 32-bit ABI, // but with the difference that any floating-point type is allowed, @@ -518,8 +513,7 @@ bool AArch64ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate() } Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr, QualType Ty, - CodeGenFunction &CGF, - AArch64ABIKind Kind) const { + CodeGenFunction &CGF) const { ABIArgInfo AI = classifyArgumentType(Ty, /*IsVariadic=*/true, CGF.CurFnInfo->getCallingConvention()); // Empty records are ignored for parameter passing purposes. @@ -544,8 +538,7 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr, QualType Ty, BaseTy = ArrTy->getElementType(); NumRegs = ArrTy->getNumElements(); } - bool IsFPR = Kind != AArch64ABIKind::AAPCSSoft && - (BaseTy->isFloatingPointTy() || BaseTy->isVectorTy()); + bool IsFPR = BaseTy->isFloatingPointTy() || BaseTy->isVectorTy(); // The AArch64 va_list type and handling is specified in the Procedure Call // Standard, section B.4: diff --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp index 72e837e13afed1..cfb653e665ea03 100644 --- a/clang/lib/Sema/Sema.cpp +++ b/clang/lib/Sema/Sema.cpp @@ -1944,21 +1944,6 @@ Sema::SemaDiagnosticBuilder Sema::Diag(SourceLocation Loc, unsigned DiagID, return DB; } -static bool typeIsOrContainsFloat(const Type &Ty) { - if (Ty.isFloatingType()) - return true; - - if (const RecordDecl *Decl = Ty.getAsRecordDecl()) { - for (const FieldDecl *FD : Decl->fields()) { - const Type &FieldType = *FD->getType(); - if (typeIsOrContainsFloat(FieldType)) - return true; - } - } - - return false; -} - void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { if (isUnevaluatedContext() || Ty.isNull()) return; @@ -2103,25 +2088,6 @@ void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { !Builtin::evaluateRequiredTargetFeatures("sme", CallerFeatureMap)) Diag(D->getLocation(), diag::err_sve_vector_in_non_sve_target) << Ty; } - - // Don't allow any floating-point types (including structs containing - // floats) for ABIs which do not support them. - if (!TI.hasFPTypes() && typeIsOrContainsFloat(*UnqualTy)) { - PartialDiagnostic PD = PDiag(diag::err_target_unsupported_type_for_abi); - - if (D) - PD << D; - else - PD << "expression"; - - if (Diag(Loc, PD, FD) << Ty << TI.getABI()) { - if (D) - D->setInvalidDecl(); - } - - if (D) - targetDiag(D->getLocation(), diag::note_defined_here, FD) << D; - } }; CheckType(Ty); diff --git a/clang/test/CodeGen/aarch64-soft-float-abi.c b/clang/test/CodeGen/aarch64-soft-float-abi.c deleted file mode 100644 index 54564310752029..00000000000000 --- a/clang/test/CodeGen/aarch64-soft-float-abi.c +++ /dev/null @@ -1,56 +0,0 @@ -// RUN: %clang_cc1 -triple aarch64 -target-feature +fp-armv8 -target-abi aapcs -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD -// RUN: %clang_cc1 -triple aarch64 -target-feature -fp-armv8 -target-abi aapcs-soft -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,SOFT - -// See also llvm/test/CodeGen/AArch64/soft-float-abi.ll, which checks the LLVM -// backend parts of the soft-float ABI. - -// The va_list type does not change between the ABIs -// CHECK: %struct.__va_list = type { ptr, ptr, ptr, i32, i32 } - -// Floats are passed in integer registers, this will be handled by the backend. -// CHECK: define dso_local half @test0(half noundef %a) -// CHECK: define dso_local bfloat @test1(bfloat noundef %a) -// CHECK: define dso_local float @test2(float noundef %a) -// CHECK: define dso_local double @test3(double noundef %a) -// CHECK: define dso_local fp128 @test4(fp128 noundef %a) -__fp16 test0(__fp16 a) { return a; } -__bf16 test1(__bf16 a) { return a; } -float test2(float a) { return a; } -double test3(double a) { return a; } -long double test4(long double a) { return a; } - -// No types are considered to be HFAs or HVAs by the soft-float PCS, so these -// are converted to integer types. -struct A { - float x; -}; -// SOFT: define dso_local i32 @test10(i64 %a.coerce) -// HARD: define dso_local %struct.A @test10([1 x float] alignstack(8) %a.coerce) -struct A test10(struct A a) { return a; } - -struct B { - double x; - double y; -}; -// SOFT: define dso_local [2 x i64] @test11([2 x i64] %a.coerce) -// HARD: define dso_local %struct.B @test11([2 x double] alignstack(8) %a.coerce) -struct B test11(struct B a) { return a; } - -#include <stdarg.h> - -// For variadic arguments, va_arg will always retreive -// CHECK-LABEL: define dso_local double @test20(i32 noundef %a, ...) -// CHECK: %vl = alloca %struct.__va_list, align 8 -// SOFT: %gr_offs_p = getelementptr inbounds %struct.__va_list, ptr %vl, i32 0, i32 3 -// SOFT: %reg_top_p = getelementptr inbounds %struct.__va_list, ptr %vl, i32 0, i32 1 -// HARD: %vr_offs_p = getelementptr inbounds %struct.__va_list, ptr %vl, i32 0, i32 4 -// HARD: %reg_top_p = getelementptr inbounds %struct.__va_list, ptr %vl, i32 0, i32 2 -double test20(int a, ...) { - va_list vl; - va_start(vl, a); - return va_arg(vl, double); -} - -// Vector types are only available for targets with the correct hardware, and -// their calling-convention is left undefined by the soft-float ABI, so they -// aren't tested here. diff --git a/clang/test/CodeGen/attr-target-clones-aarch64.c b/clang/test/CodeGen/attr-target-clones-aarch64.c index 47eceadd4376f6..5ea3f4a9b0b112 100644 --- a/clang/test/CodeGen/attr-target-clones-aarch64.c +++ b/clang/test/CodeGen/attr-target-clones-aarch64.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-attributes --check-globals --include-generated-funcs -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fp-armv8 -S -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fp-armv8 -target-feature -fmv -S -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fmv -S -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV int __attribute__((target_clones("lse+aes", "sve2"))) ftc(void) { return 0; } int __attribute__((target_clones("sha2", "sha2+memtag2", " default "))) ftc_def(void) { return 1; } @@ -414,23 +414,23 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default")) // CHECK-NOFMV-NEXT: ret i32 [[ADD5]] // //. -// CHECK: attributes #[[ATTR0:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse,+neon,-fp-armv8" } -// CHECK: attributes #[[ATTR1:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,+sve,+sve2,-fp-armv8" } -// CHECK: attributes #[[ATTR2:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-fp-armv8" } -// CHECK: attributes #[[ATTR3:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon,+sha2,-fp-armv8" } -// CHECK: attributes #[[ATTR4:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+mte,+neon,+sha2,-fp-armv8" } -// CHECK: attributes #[[ATTR5:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon,-fp-armv8" } -// CHECK: attributes #[[ATTR6:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+dotprod,+neon,-fp-armv8" } -// CHECK: attributes #[[ATTR7:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon,+rand,-fp-armv8" } -// CHECK: attributes #[[ATTR8:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+predres,+rcpc,-fp-armv8" } -// CHECK: attributes #[[ATTR9:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,+sve,+sve2,+sve2-aes,+wfxt,-fp-armv8" } -// CHECK: attributes #[[ATTR10:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,-fp-armv8" } -// CHECK: attributes #[[ATTR11:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+complxnum,+fullfp16,+neon,+sve,+sve2,+sve2-bitperm,-fp-armv8" } -// CHECK: attributes #[[ATTR12:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bti,-fp-armv8" } -// CHECK: attributes #[[ATTR13:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,+sb,+sve,-fp-armv8" } +// CHECK: attributes #[[ATTR0:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+lse,+neon" } +// CHECK: attributes #[[ATTR1:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2" } +// CHECK: attributes #[[ATTR2:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +// CHECK: attributes #[[ATTR3:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+sha2" } +// CHECK: attributes #[[ATTR4:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+mte,+neon,+sha2" } +// CHECK: attributes #[[ATTR5:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon" } +// CHECK: attributes #[[ATTR6:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+dotprod,+fp-armv8,+neon" } +// CHECK: attributes #[[ATTR7:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rand" } +// CHECK: attributes #[[ATTR8:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+predres,+rcpc" } +// CHECK: attributes #[[ATTR9:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/82032 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
